A digitally calibrated low-power ring oscillator

This paper presents a digitally calibrated low-power ring oscillator with a high accuracy and stable output over process, voltage and temperature variation. A digital calibration algorithm to overcome the deviation of the process is used in the circuit. The oscillator is implemented in TSMC 0.35μm CMOS technology in this paper. The test result shows that the oscillator can provide a 1-MHz output clock with frequency offset of less than about 5%, and power consumption is about 10 uA.