Lagrange's polynomial based farrow filter implementation for SDR

Software defined radio (SDR) seems to be a solution for communications for rapid changes in the communication standards. The two most computation and resource intensive tasks in the design of receiver for Software Defined Radio (SDR) are Sample Rate Conversion (SRC) and Channel-ization. Cascaded Integrator Comb (CIC) filters are suitable when Sample rate change by a large factor is desired. However, CIC filters suffers from the disadvantage of large droop in the passband. In this paper two filters are proposed namely, a reconfigurable CIC compensation filter for droop compensation and a Farrow interpolation filter based on the Lagrange cubic polynomials to match the symbol rate of the standard. VHDL models for the two filters were developed and the functionality is simulated using Xilinx ISE 14.2. The design is implemented on XC6VCX240t-2FF484 FPGA. It may be observed from the results presented that the proposed method achieves more than fifty percent hardware reduction compared to the joint compensation interpolation filter proposed in the literature.

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