EOmesh: Combined Flow Balancing and Deterministic Routing for Reduced WCET Estimates in Embedded Real-Time Systems
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[1] Computing Accurate Performance Bounds for Best Effort Networks-on-Chip , 2013, IEEE Transactions on Computers.
[2] Miodrag Potkonjak,et al. MediaBench: a tool for evaluating and synthesizing multimedia and communications systems , 1997, Proceedings of 30th Annual International Symposium on Microarchitecture.
[3] Alan Burns,et al. Real-Time Communication Analysis for On-Chip Networks with Wormhole Switching , 2008, Second ACM/IEEE International Symposium on Networks-on-Chip (nocs 2008).
[4] Francisco J. Cazorla,et al. Modeling High-Performance Wormhole NoCs for Critical Real-Time Embedded Systems , 2016, 2016 IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS).
[5] Martin Schoeberl,et al. A Statically Scheduled Time-Division-Multiplexed Network-on-Chip for Real-Time Systems , 2012, 2012 IEEE/ACM Sixth International Symposium on Networks-on-Chip.
[6] C.B. Watkins,et al. Transitioning from federated avionics architectures to Integrated Modular Avionics , 2007, 2007 IEEE/AIAA 26th Digital Avionics Systems Conference.
[7] Mladen Berekovic,et al. NoC Switch with Credit Based Guaranteed Service Support Qualified for GALS Systems , 2010, 2010 13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools.
[8] Francisco J. Cazorla,et al. Improving performance guarantees in wormhole mesh NoC designs , 2016, 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE).
[9] Axel Jantsch,et al. The Nostrum backbone-a communication protocol stack for Networks on Chip , 2004, 17th International Conference on VLSI Design. Proceedings..
[10] Jens Sparsø. Design of Networks-on-Chip for Real-Time Multi-processor Systems-on-Chip , 2012, 2012 12th International Conference on Application of Concurrency to System Design.
[11] Thomas M. Conte,et al. A Benchmark Characterization of the EEMBC Benchmark Suite , 2009, IEEE Micro.
[12] Eduardo Quiñones,et al. OpenMP Tasking Model for Ada: Safety and Correctness , 2017, Ada-Europe.
[13] Kees Goossens,et al. AEthereal network on chip: concepts, architectures, and implementations , 2005, IEEE Design & Test of Computers.
[14] Francisco J. Cazorla,et al. Parallel many-core avionics systems , 2014, 2014 International Conference on Embedded Software (EMSOFT).
[15] Francisco J. Cazorla,et al. Deconstructing bus access control policies for Real-Time multicores , 2013, 2013 8th IEEE International Symposium on Industrial Embedded Systems (SIES).
[16] Sunggu Lee. Real-time wormhole channels , 2003, J. Parallel Distributed Comput..
[17] Kiyoung Choi,et al. Position-based weighted round-robin arbitration for equality of service in many-core network-on-chips , 2012, NoCArc '12.
[18] Chrysostomos Nicopoulos,et al. PhaseNoC: TDM scheduling at the virtual-channel level for efficient network traffic isolation , 2015, 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE).
[19] Rolf Ernst,et al. Worst-case communication time analysis of networks-on-chip with shared virtual channels , 2015, 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE).
[20] Ying Gao,et al. SurfNoC: a low latency and provably non-interfering approach to secure networks-on-chip , 2013, ISCA.
[21] Jason A. Poovey. Characterization of the EEMBC Benchmark Suite , 2007 .
[22] Roman Obermaisser,et al. The time-triggered System-on-a-Chip architecture , 2008, ISIE 2008.
[23] Alan Burns,et al. Real-Time Communication Analysis with a Priority Share Policy in On-Chip Networks , 2009, 2009 21st Euromicro Conference on Real-Time Systems.