A Heterogeneous Co-simulation Environment for Complex Embedded Telecommunication Systems

Bridging the different abstraction layers stemming from heterogeneous tools used in hardware software co-design for creating, maintaining and refining various system models form often a bottleneck in the overall design process. The missing test link between the specification level and the first refinement steps reveals the need for an environment that will enable the effective communication among the corresponding tools. This will also enable IP components to be reused early enough in the development cycle, even if their abstraction levels are different. This paper proposes a heterogeneous co-simulation approach to address this lack at this design stage. The overall result is an efficient environment that verifies and evaluates the conformance of the specification of a complex embedded system to its refinement.