Analysis and Design of an ABFT and Parity-Checking Technique in High Performance Computing Systems

We present a new approach to algorithm-based fault tolerance (ABFT) and parity-checking techniques in the design of high performance computing systems. The ABFT technique employs real convolution error-correcting codes to encode the input data. In order to reduce the round-off error from the output decoding process, systematic real convolution encoding is employed. This paper proposes an efficient method to detect the arithmetic errors using convolution codes at the output compared with an equivalent parity value derived from the input data. Number data processing errors are detected by comparing parity values associated with a convolution code. These comparable sets will be very close numerically, although not identical because of round-off error differences between the two parity generation processes. The effects of internal failures and round-off error are modeled by additive error sources located at the output of the processing block and input at threshold detector. This model combines the aggregate effects of errors and applies them to the respective outputs.