Analysis of Failure Mechanisms and Extraction of Activation Energies $(E_{a})$ in 21-nm nand Flash Cells

In this letter, we point out the methodological problem of the conventional temperature-accelerated life-test method of nand Flash memory. We confirm that the generally assumed Arrhenius law is inconsistent with extrapolation of data-retention time-to-failure of nand Flash memory since several failure mechanisms come up together. For the first time, we completely separated three main failure mechanisms and extracted each activation energy (Ea) in 21-nm nand Flash memory. From the results, we assured that each failure mechanism follows the Arrhenius law. In order to estimate the lifetime of nand Flash memory accurately, each failure mechanism should be considered.

[1]  Kinam Kim,et al.  Degradation of tunnel oxide by FN current stress and its effects on data retention characteristics of 90 nm NAND flash memory cells , 2003, 2003 IEEE International Reliability Physics Symposium Proceedings, 2003. 41st Annual..

[2]  A. Visconti,et al.  Threshold-Voltage Instability Due to Damage Recovery in Nanoscale NAND Flash Memories , 2011, IEEE Transactions on Electron Devices.

[3]  P. Kalavade,et al.  Flash EEPROM threshold instabilities due to charge trapping during program/erase cycling , 2004, IEEE Transactions on Device and Materials Reliability.

[4]  T. Kubota,et al.  Bias-temperature degradation of pMOSFETs: mechanism and suppression , 2000, 2000 IEEE International Reliability Physics Symposium Proceedings. 38th Annual (Cat. No.00CH37059).

[5]  G. Sery,et al.  A model for EPROM intrinsic charge loss through oxide-nitride-oxide (ONO) interpoly dielectric , 1990, 28th Annual Proceedings on Reliability Physics Symposium.

[6]  N. Mielke,et al.  Universal recovery behavior of negative bias temperature instability [PMOSFETs] , 2003, IEEE International Electron Devices Meeting 2003.

[7]  L. Larcher,et al.  Mechanism of high-k dielectric-induced breakdown of the interfacial SiO2 layer , 2010, 2010 IEEE International Reliability Physics Symposium.

[8]  B. Govoreanu,et al.  On the Roll-Off of the Activation Energy Plot in High-Temperature Flash Memory Retention Tests and its Impact on the Reliability Assessment , 2008, IEEE Electron Device Letters.

[9]  M.A. Alam,et al.  Investigation and modeling of interface and bulk trap generation during negative bias temperature instability of p-MOSFETs , 2004, IEEE Transactions on Electron Devices.

[10]  Gerard Ghibaudo,et al.  Electric field and temperature dependence of the stress induced leakage current: Fowler–Nordheim or Schottky emission? , 1999 .

[11]  B. De Salvo,et al.  A new extrapolation law for data-retention time-to-failure of nonvolatile memories , 1999, IEEE Electron Device Letters.

[12]  R. S. Scott,et al.  Thickness dependence of stress-induced leakage currents in silicon oxide , 1997 .

[13]  R. E. Shiner,et al.  Data Retention in EPROMS , 1980, 18th International Reliability Physics Symposium.

[14]  H. Higuchi,et al.  Temperature Accelerated Estimation of MNOS Memory Reliability , 1981, 19th International Reliability Physics Symposium.

[15]  Kinam Kim,et al.  Effects of interface trap generation and annihilation on the data retention characteristics of flash memory cells , 2004 .