Systematic prototyping of superscalar computer architectures

It is argued that the correct solution to the computer architecture design process is a prototyping approach. In this approach, the initial design is selected using the workload itself. This design is an architectural prototype, specifying the high-level design decisions that are difficult to acquire via detailed simulation. These design decisions include determining the mix of function units in the execution stage of the processor and the dimensions of the caches in the memory subsystem. Architectural prototypes are selected by trading off accuracy in hardware simulation for an increase in usable workload size.<<ETX>>

[1]  Michael Shebanow,et al.  Single instruction stream parallelism is greater than two , 1991, ISCA '91.

[2]  W. Kent Fuchs,et al.  TRAPEDS: producing traces for multicomputers via execution driven simulation , 1989, SIGMETRICS '89.

[3]  Irving L. Traiger,et al.  Evaluation Techniques for Storage Hierarchies , 1970, IBM Syst. J..

[4]  Wen-mei W. Hwu,et al.  Combining Sampling with Single-Pass Techniques for Efficient Cache Simulation , 1991 .

[5]  J A Fisher,et al.  Instruction-Level Parallel Processing , 1991, Science.

[6]  Alan Jay Smith,et al.  Efficient Analysis of Caching Systems , 1987 .

[7]  Yale N. Patt,et al.  Experimental Research in Computer Architecture - Guest Editor's Introduction to the Special Issue , 1991, Computer.

[8]  J. E. Thornton,et al.  Parallel operation in the control data 6600 , 1964, AFIPS '64 (Fall, part II).

[9]  Janak H. Patel,et al.  Accurate Low-Cost Methods for Performance Evaluation of Cache Memory Systems , 1988, IEEE Trans. Computers.

[10]  Thomas M. Conte,et al.  The Susceptibility of Programs to Context Switching , 1994, IEEE Trans. Computers.

[11]  Alan Jay Smith,et al.  Second bibliography on Cache memories , 1991, CARN.

[12]  Yale N. Patt,et al.  DESIGN CHOICES FOR THE HPSm MICROPROCESSOR CHIP. , 1987 .

[13]  William M. Johnson,et al.  Super-scalar processor design , 1989 .

[14]  Alan Jay Smith,et al.  Evaluating Associativity in CPU Caches , 1989, IEEE Trans. Computers.

[15]  R. M. Tomasulo,et al.  An efficient algorithm for exploiting multiple arithmetic units , 1995 .

[16]  George Cybenko,et al.  Supercomputer performance evaluation and the Perfect Benchmarks , 1990, ICS '90.

[17]  Thomas M. Conte,et al.  Benchmark characterization , 1991, Computer.

[18]  Thomas M. Conte,et al.  A brief survey of benchmark usage in the architecture community , 1991, CARN.