UML/XML based approach to hierarchical AMS Synthesis

This chapter explores the suitability of unified modeling language (UML) techniques for defining hierarchical relationships in analogue and mixed signal (AMS) circuit blocks, and extensible markup language (XML) for storing soft AMS intellectual property (IP) design rules and firm AMS IP design data. Both aspects are essential to raising the abstraction level in synthesis of this class of block in SoCs. The various facets of AMS IP are discussed, and explicit mappings to concepts in UML are demonstrated. Then, through a simple example block, these concepts are applied and the successful modification of an existing analogue synthesis tool to incorporate these ideas is proven. The central data format of this tool is XML, and several examples are given showing how this metalanguage can be used in both AMS soft-IP creation and firm-IP synthesis.

[1]  A. Mantooth,et al.  Automatic generation of compact semiconductor device models using Paragon and ADMS , 2004, Proceedings of the 2004 IEEE International Behavioral Modeling and Simulation Conference, 2004. BMAS 2004..

[2]  Ian O'Connor,et al.  Predictive design space exploration of maximum bandwidth CMOS photoreceiver preamplifiers , 2003, 10th IEEE International Conference on Electronics, Circuits and Systems, 2003. ICECS 2003. Proceedings of the 2003.

[3]  Yannick Hervé,et al.  Requirements and Verifications through an extension of VHDL-AMS , 2004, FDL.

[4]  Ian O'Connor,et al.  Hierarchical synthesis of high-speed CMOS photoreceiver front-ends using a multi-domain behavioural description language , 2003, FDL.

[5]  Wim Dehaene,et al.  UML 2 and SysML: an approach to deal with complexity in SoC/NoC design , 2005, Design, Automation and Test in Europe.

[6]  Christoph Grimm,et al.  SystemC-AMS requirements, design objectives and rationale , 2003, 2003 Design, Automation and Test in Europe Conference and Exhibition.

[7]  Elvinia Riccobene,et al.  A SoC design methodology involving a UML 2.0 profile for SystemC , 2005, Design, Automation and Test in Europe.

[8]  T. Martin McGinnity,et al.  Integration of UML and VHDL-AMS for analogue system modelling , 2003, Formal Aspects of Computing.

[9]  Shahriar Mirabbasi,et al.  Analog IP design flow for SoC applications , 2003, Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03..

[10]  Alex Doboli,et al.  Behavioral modeling for high-level synthesis of analog and mixed-signal systems from VHDL-AMS , 2003, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[11]  Georges G. E. Gielen,et al.  Analog and digital circuit design in 65 nm CMOS: end of the road? , 2005, Design, Automation and Test in Europe.

[12]  Ian O'Connor,et al.  RUNE: platform for automated design of integrated multi-domain systems application to high-speed CMOS photoreceiver front-ends , 2004, Proceedings Design, Automation and Test in Europe Conference and Exhibition.