A preliminary study of incorporating GPUs in the Hadoop framework

Fine-grained parallel processors can be employed as accelerators in MapReduce clusters to improve the completion time of MapReduce jobs or to substantially reduce the size of the clusters required to achieve a desired parallel speedup. However, significant architectural differences between conventional CPUs and accelerators pose new challenges for effective scheduling of MapReduce tasks on individual cluster nodes. In this paper, we present a Hadoop-based framework that allows employing both CPUs and GPUs for MapReduce-type applications. We base a novel framework, called Surena, on existing work that allows writing MapReduce applications for GPUs and they incorporate it in the overall Hadoop framework. In particular, we show that by using simple scheduling optimizations, Surena can fully utilize GPUs during the map phase of MapReduce jobs which is often the dominant component in the total execution time of MapReduce applications. Our performance results shows speedups of up to 21x for our framework compare to Hadoop.

[1]  Sanjay Ghemawat,et al.  MapReduce: Simplified Data Processing on Large Clusters , 2004, OSDI.

[2]  Dimitrios S. Nikolopoulos,et al.  Rearchitecting MapReduce for Heterogeneous Multicore Processors with Explicitly Managed Memories , 2010, 2010 39th International Conference on Parallel Processing.

[3]  Reza Azimi,et al.  Soren: Adaptive MapReduce for Programmable GPUs , 2011 .

[4]  J. Xu OpenCL – The Open Standard for Parallel Programming of Heterogeneous Systems , 2009 .

[5]  Gang Wang,et al.  ACM/SIGDA International Symposium on Field Programmable Gate Arrays - FPGA , 2005 .

[6]  Copyright © Intel Corporation 2008 * Other names and brands may be claimed as the property of others , 2004 .

[7]  Roy H. Campbell,et al.  MITHRA: Multiple data independent tasks on a heterogeneous resource architecture , 2009, 2009 IEEE International Conference on Cluster Computing and Workshops.

[8]  William Gropp,et al.  An adaptive performance modeling tool for GPU architectures , 2010, PPoPP '10.

[9]  Yu Wang,et al.  FPMR: MapReduce framework on FPGA , 2010, FPGA '10.

[10]  Naga K. Govindaraju,et al.  Mars: A MapReduce Framework on graphics processors , 2008, 2008 International Conference on Parallel Architectures and Compilation Techniques (PACT).

[11]  Benjamin Rose,et al.  CellMR: A framework for supporting mapreduce on asymmetric cell-based clusters , 2009, 2009 IEEE International Symposium on Parallel & Distributed Processing.

[12]  Christoforos E. Kozyrakis,et al.  Phoenix rebirth: Scalable MapReduce on a large-scale shared-memory system , 2009, 2009 IEEE International Symposium on Workload Characterization (IISWC).

[13]  Bingsheng He,et al.  Mars: Accelerating MapReduce with Graphics Processors , 2011, IEEE Transactions on Parallel and Distributed Systems.