Emulating Transactional Memory on FPGA Multiprocessors

In this paper we discuss the development of two emulation platforms for transactional memory systems on a single Field Programmable Gate Array (FPGA). We introduce two systems, integrating only off-the-shelf components, that respectively use a centralized and a distributed approach, presenting their hardware and software design. We analyze and compare these two architectures to a lock based multiprocessor prototype, discussing the trade-offs in terms of design complexity, performance and scalability.

[1]  Craig B. Zilles,et al.  Using Hardware Memory Protection to Build a High-Performance, Strongly-Atomic Hybrid Transactional Memory , 2008, 2008 International Symposium on Computer Architecture.

[2]  Mark L. Chang,et al.  Low-Cost Stereo Vision on an FPGA , 2007 .

[3]  Gianluca Palermo,et al.  HW/SW methodologies for synchronization in FPGA multiprocessors , 2009, FPGA '09.

[4]  Shlomo Weiss,et al.  Investigation of Transactional Memory Using FPGAs , 2006, 2006 IEEE 24th Convention of Electrical & Electronics Engineers in Israel.

[5]  José Manuel Ferrández Vicente,et al.  Hand-based Interface for Augmented Reality. Poster , 2007 .

[6]  James R. Goodman,et al.  Transactional lock-free execution of lock-based programs , 2002, ASPLOS X.

[7]  John Wawrzynek,et al.  Research accelerator for multiple processors , 2006, 2006 IEEE Hot Chips 18 Symposium (HCS).

[8]  Kunle Olukotun,et al.  Transactional coherence and consistency: simplifying parallel hardware and software , 2004, IEEE Micro.

[9]  Rachid Guerraoui,et al.  Why STM can be more than a research toy , 2011, Commun. ACM.

[10]  Maurice Herlihy,et al.  Transactional Memory: Architectural Support For Lock-free Data Structures , 1993, Proceedings of the 20th Annual International Symposium on Computer Architecture.

[11]  Nir Shavit,et al.  Software transactional memory , 1995, PODC '95.

[12]  Kunle Olukotun,et al.  ATLAS: A Chip-Multiprocessor with Transactional Memory Support , 2007, 2007 Design, Automation & Test in Europe Conference & Exhibition.

[13]  Duncan A. Buell,et al.  Splash 2 , 1992, SPAA.

[14]  Christoforos Kachris,et al.  Configurable Transactional Memory , 2007, 15th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2007).