A Fast Longer Path Algorithm for Routing Grid with Obstacles Using Biconnectivity Based Length Upper Bound

In recent VLSI systems, signal propagation delays are requested to achieve the specifications with very high accuracy. In order to meet the specifications, the routing of a net often needs to be detoured in order to increase the routing delay. A routing method should utilize a routing area with obstacles as much as possible in order to realize the specifications of nets simultaneously. In this paper, a fast longer path algorithm that generates a path of a net in routing grid so that the length is increased as much as possible is proposed. In the proposed algorithm, an upper bound for the length in which the structure of a routing area is taken into account is used. Experiments show that our algorithm utilizes a routing area with obstacles efficiently.

[1]  Atsushi Takahashi,et al.  A fast longer path algorithm for routing grid with obstacles using biconnectivity based length upper bound , 2009, 2009 Asia and South Pacific Design Automation Conference.

[2]  Martin D. F. Wong,et al.  A Length-Matching Routing Algorithm for High-Performance Printed Circuit Boards , 2006, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[3]  Robert E. Tarjan,et al.  Depth-First Search and Linear Graph Algorithms , 1972, SIAM J. Comput..

[4]  C. Y. Lee An Algorithm for Path Connections and Its Applications , 1961, IRE Trans. Electron. Comput..

[5]  Martin D. F. Wong,et al.  Algorithmic study of single-layer bus routing for high-speed boards , 2006, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[6]  Jayme Luiz Szwarcfiter,et al.  Hamilton Paths in Grid Graphs , 1982, SIAM J. Comput..