A Case for Effic ient Hardware/Soft ware Cooperative Management of Storage and Memory

Most applications manipulate persistent data, yet traditional systems decouple data manipulation from persistence in a two-level storage model. Programming languages and system software manipulate data in one set of formats in volatile main memory (DRAM) using a load/store interface, while storage systems maintain persistence in another set of formats in non-volatile memories, such as Flash and hard disk drives in traditional systems, using a file system interface. Unfortunately, such an approach suffers from the system performance and energy overheads of locating data, moving data, and translating data between the different formats of these two levels of storage that are accessed via two vastly different interfaces. Yet today, new non-volatile memory (NVM) technologies show the promise of storage capacity and endurance similar to or better than Flash at latencies comparable to DRAM, making them prime candidates for providing applications a persistent single-level store with a single load/store interface to access all system data. Our key insight is that in future systems equipped with NVM, the energy consumed executing operating system and file system code to access persistent data in traditional systems becomes an increasingly large contributor to total energy. The goal of this work is to explore the design of a Persistent Memory Manager that coordinates the management of memory and storage under a single hardware unit in a single address space. Our initial simulation-based exploration shows that such a system with a persistent memory can improve energy efficiency and performance by eliminating the instructions and data movement traditionally used to perform I/O operations.

[1]  Mircea R. Stan,et al.  Advances and Future Prospects of Spin-Transfer Torque Random Access Memory , 2010, IEEE Transactions on Magnetics.

[2]  Malcolm P. Atkinson,et al.  An orthogonally persistent Java , 1996, SGMD.

[3]  Robert C. Daley,et al.  The Multics virtual memory , 1972, Commun. ACM.

[4]  J. Shapiro,et al.  EROS: a fast capability system , 2000, OPSR.

[5]  Onur Mutlu,et al.  Architecting phase change memory as a scalable dram alternative , 2009, ISCA '09.

[6]  Frank G. Soltis.  Inside the As/400 , 1996 .

[7]  David J. DeWitt,et al.  QuickStore: A High Performance Mapped Object Store , 1994, SIGMOD Conference.

[8]  Michael Wu,et al.  eNVy: a non-volatile, main memory storage system , 1994, ASPLOS VI.

[9]  Peter M. Chen,et al.  The Rio file cache: surviving operating system crashes , 1996, ASPLOS VII.

[10]  Michael P. Mesnier,et al.  Differentiated storage services , 2011, OPSR.

[11]  Gabriel H. Loh,et al.  Fundamental Latency Trade-off in Architecting DRAM Caches: Outperforming Impractical SRAM-Tags with a Simple and Practical Design , 2012, 2012 45th Annual IEEE/ACM International Symposium on Microarchitecture.

[12]  Christopher Frost,et al.  Better I/O through byte-addressable, persistent memory , 2009, SOSP '09.

[13]  Tom Kilburn,et al.  One-Level Storage System , 1962, IRE Trans. Electron. Comput..

[14]  Rachata Ausavarungnirun,et al.  Row Buffer Locality-Aware Data Placement in Hybrid Memories , 2011 .

[15]  Ronald Morrison,et al.  An Approach to Persistent Programming , 1989, Comput. J..

[16]  J. Eliot B. Moss,et al.  Working with Persistent Objects: To Swizzle or Not to Swizzle , 1992, IEEE Trans. Software Eng..

[17]  Ravi Krishnamurthy,et al.  The Case For Safe RAM , 1989, VLDB.

[18]  Mary Baker,et al.  Non-volatile memory for fast, reliable file systems , 1992, ASPLOS V.

[19]  Mahmut T. Kandemir,et al.  Evaluating STT-RAM as an energy-efficient main memory alternative , 2013, 2013 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS).

[20]  Setrag Khoshafian,et al.  Object identity , 1986, OOPLSA '86.

[21]  Sangyeun Cho,et al.  Memorage: emerging persistent RAM based malleable main memory and storage architecture , 2013, ICS '13.

[22]  Tajana Simunic,et al.  PDRAM: A hybrid PRAM and DRAM main memory system , 2009, 2009 46th ACM/IEEE Design Automation Conference.

[23]  Rajesh K. Gupta,et al.  NV-Heaps: making persistent objects fast and safe with next-generation, non-volatile memories , 2011, ASPLOS XVI.

[24]  Michael J. Carey,et al.  The design of the E programming language , 1993, TOPL.

[25]  Malcolm P. Atkinson,et al.  PS-algol: an algol with a persistent heap , 1982, SIGP.

[26]  Jonathan Adams,et al.  Design Evolution of the EROS Single-Level Store , 2002, USENIX Annual Technical Conference, General Track.

[27]  Jing Li,et al.  A case for small row buffers in non-volatile main memories , 2012, 2012 IEEE 30th International Conference on Computer Design (ICCD).

[28]  Luca Cardelli. Amber.  Combinators and Functional Programming Languages , 1985, Lecture Notes in Computer Science.

[29]  Gerhard Weikum,et al.  Uniform Object Management , 1990, EDBT.

[30]  Peter M. Chen,et al.  Free transactions with Rio Vista , 1997, SOSP.

[31]  D. Andersen,et al.  Persistent , Protected and Cached : Building Blocks for Main Memory Data Stores , 2011 .

[32]  Vijayalakshmi Srinivasan,et al.  Scalable high performance main memory system using phase-change memory technology , 2009, ISCA '09.

[33]  Onur Mutlu,et al.  Enabling Efficient and Scalable Hybrid Memories Using Fine-Granularity DRAM Cache Management , 2012, IEEE Computer Architecture Letters.

[34]  Renzo Orsini,et al.  GALILEO: a strongly-typed, interactive conceptual language , 1985, TODS.

[35]  Luis Ceze,et al.  Operating System Implications of Fast, Cheap, Non-Volatile Memory , 2011, HotOS.

[36]  H.-S. Philip Wong,et al.  Phase Change Memory , 2010, Proceedings of the IEEE.

[37]  Jeffrey Katcher,et al.  PostMark: A New File System Benchmark , 1997 .

[38]  Terence Kelly,et al.  Composable Reliability for Asynchronous Systems , 2012, USENIX Annual Technical Conference.

[39]  Jung Ho Ahn,et al.  McPAT: An integrated power, area, and timing modeling framework for multicore and manycore architectures , 2009, 2009 42nd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO).

[40]  Vijay R Vasudevan,et al.  Energy-efficient Data-intensive Computing with a Fast Array of Wimpy Nodes , 2011 .

[41]  Eugene J. Shekita,et al.  Cricket: A Mapped, Persistent Object Store , 1990, POS.

[42]  Shuichi Oikawa,et al.  Integrating memory management with a file system on a non-volatile main memory system , 2013, SAC '13.

[43]  Rajesh K. Gupta,et al.  Moneta: A High-Performance Storage Array Architecture for Next-Generation, Non-volatile Memories , 2010, 2010 43rd Annual IEEE/ACM International Symposium on Microarchitecture.