Systolic Array Synthesis by Static Analysis of Program Dependencies

We present a technique for synthesizing systolic arrays which have non-uniform data flow governed by control signals. The starting point for the synthesis is a Recurrence Equation with Linear Depencencies (RELD) which is a generalization of the simple recurrences encountered in mathematics. A large class of programs, including all (single and multiple) nested-loop programs can be described by such recurrences. In this paper we extend some of our earlier work [17] in two principal directions. Firstly, we describe a transformation called multistage pipelining and show that it yields recurrences that have linear conditional expressions governing the computation. Secondly, we discuss how it is possible to automatically derive control signals that govern the data flow by applying the same pipelining transformations to these linear conditional expressions. The approach is illustrated by deriving the Guibas-Kung-Thompson architecture for optimum string parenthesization.

[1]  Benjamin W. Wah,et al.  The Design of Optimal Systolic Arrays , 1985, IEEE Transactions on Computers.

[2]  Marina C. Chen.  A parallel language and its compilation to multiprocessor machines or VLSI , 1986, POPL '86.

[3]  H. T. Kung,et al.  Direct VLSI Implementation of Combinatorial Algorithms , 1979 .

[4]  Patrice Quinton,et al.  The systematic design of systolic arrays , 1987 .

[5]  H. T. Kung.  Let's Design Algorithms for VLSI Systems , 1979 .

[6]  I. V. Ramakrishnan,et al.  Mapping Homogeneous Graphs on Linear Arrays , 1986, IEEE Transactions on Computers.

[7]  Sanjay V. Rajopadhye,et al.  On Synthesizing Systolic Arrays from Recurrence Equations with Linear Dependencies , 1986, FSTTCS.

[8]  Peter R. Cappello,et al.  Selecting Systolic Designs Using Linear Transformations Of Space-Time , 1984, Optics & Photonics.

[9]  Rami G. Melhem,et al.  Synthesizing Non-Uniform Systolic Designs , 1986, ICPP.

[10]  Al Davis,et al.  A Wavefront Notation Tool for VLSI Array Design , 1981 .

[11]  H. T. Kung.  Why systolic architectures? , 1982, Computer.

[12]  Charles E. Leiserson,et al.  Optimizing synchronous systems , 1981, 22nd Annual Symposium on Foundations of Computer Science (sfcs 1981).

[13]  Monica S. Lam,et al.  A Transformational Model of VLSI Systolic Design , 1985, Computer.

[14]  Dan I. Moldovan,et al.  Data broadcasting in linearly scheduled array processors , 1984, ISCA 1984.

[15]  D.I. Moldovan,et al.  On the design of algorithms for VLSI systolic arrays , 1983, Proceedings of the IEEE.