A fully-asynchronous digital signal processor using self-timed circuits

Self-timed circuits with an appropriate handshake protocol can be used to eliminate the requirement for a global clock in a system. At the board level, asynchronous interfaces already make use of this approach. The natural extension of this concept is to use the same communication between blocks within an IC. To demonstrate this approach, self-timed circuits, or circuits which generate a completion signal, were used, along with interconnection circuits, following a four-cycle handshaking protocol, to design and fabricate a complete general-purpose digital signal processor (DSP). Internally, stages communicate at their own speed, which is an advantage because the speed of operation no longer is constrained by the slowest block in the system. The design methodology becomes modular, the blocks being decoupled with respect to their timing considerations. The DSP contains a full data path, with several feedback paths requiring synchronization between words at different stages of the pipe. Self-timed circuits are used throughout and all communication follows a handshaking protocol. >

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