Characterization of charge injection and trapping in scaled SONOS/MONOS memory devices

Abstract In this paper we investigate scaled SONOS/MONOS (polysilicon-oxide-nitride-oxide-semiconductor)/(metal-oxide-nitride-oxide-semiconductor) memory devices, and the characterization of storage traps in the nitride. The amphoteric and closely-compensating trap models, which describe the positive and negative charging of the nitride “memory” layer, have been compared. “Scaled” complementary SONOS and MONOS nonvolatile memory transistors with the nitride thickness ranging from 85 to 185 A have been designed and fabricated. The linear voltage-ramp method, which measures the flatband voltage shift and separates the charges at the injecting boundary during the WRITE/ERASE operations, has been employed to study non-steady state trapping in the nitride of “scaled” complementary SONOS/MONOS devices for low voltage E2PROM's (electrically erasable and programmable read only memories). We have demonstrated a differential, saturated flatband voltage shift of 6.5 V with a ±8 V programming voltage for scaled-down devices with dimensions of 20 A for the tunnel oxide, 85 A for the nitride, and 51 A for the blocking oxide. Charge injection and trapping in scaled multi-dielectric structures have been modelled with an amphoteric trap concept. The trap density NT0, ≈ 1019 cm−3, effective capture cross section of electrons and holes, \ gs n + , \ gs p − ≈10 −13 cm 2 , and effective capture cross section of neutral charge states, \ gs n 0 , \ gs p 0 ≈ 10 −14 cm 2 , have been determined with an amphoteric trap model.

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