CNTFET inverter: A high voltage gain logic gate

Conventional CMOS technology provides a lot of opportunities in the field of electronics device. But presently, carbon nanotube field effect transistor (CNTFET) is a new technology for the application in the field of electronic device. Due to the limitation of the size of CMOS, CNTFETs are the promising substitute due to its nano scale size. CNTFET also shows the high stability, low power circuit design, high signal to noise margin (SNM) and high gain in the circuit design. A novel design of CNTFET based inverter with an optimum chiral vector is proposed in this paper. PSPICE platform is used to model and simulation this CNTFET inverter circuit. The proposed CNTFET inverter circuit is investigated based on noise margin characteristics. A maximum voltage gain of 45dB is observed from NCNTFET of the inverter and a high noise margin of 400mV and a low noise margin of 309mV are achieved from the proposed inverters. This approach is a useful technique for fabricating integrated logic devices and circuits based on CNTFETs.

[1]  Mohd. Hasan,et al.  Performance comparison of CNFET- and CMOS-based 6T SRAM cell in deep submicron , 2009, Microelectron. J..

[2]  H. Wong,et al.  Circuit-Level Performance Benchmarking and Scalability Analysis of Carbon Nanotube Transistor Circuits , 2009, IEEE Transactions on Nanotechnology.

[3]  A. Johnston.  Scaling and Technology Issues for Soft Error Rates , 2000 .

[4]  Soheli Farhana.  Modeling of a Carbon Nanotube Sensing Device , 2013 .

[5]  Yong-Bin Kim,et al.  Design of a CNTFET-Based SRAM Cell by Dual-Chirality Selection , 2010, IEEE Transactions on Nanotechnology.

[6]  A. H. M. Zahirul Alam,et al.  High frequency small signal modeling of CNTFET , 2013, RSM 2013 IEEE Regional Symposium on Micro and Nanoelectronics.

[7]  Soheli Farhana,et al.  Environmental Friendly Device: Modeling of Carbon Nanotube with Optimum Chirality , 2013 .

[8]  Jörg Appenzeller,et al.  Carbon Nanotubes for High-Performance Electronics—Progress and Prospect , 2008, Proceedings of the IEEE.

[9]  H.-S. Philip Wong,et al.  Design Methods for Misaligned and Mispositioned Carbon-Nanotube Immune Circuits , 2008, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[10]  Sheroz Khan,et al.  Modeling of small band-gap CNT for designing of faster switching CNTFET , 2013, 2013 IEEE Business Engineering and Industrial Applications Colloquium (BEIAC).