Optimization of test/diagnosis/rework location(s) and characteristics in electronic systems assembly using real-coded genetic algorithms

This paper presents a framework for optimizing the location(s) and characteristics (fault coverage/test cost, rework success rate/rework cost) of Test/Diagnosis/Rework (TDR) operations in the assembly process for electronic systems. A new search algorithm called Waiting Sequence Search (WSS) is applied to traverse a general process flow in order to perform the cumulative calculation of a yielded cost objective function. Real-Coded Genetic Algorithms (RCGAs) are used to perform a multi-variable optimization that minimizes yielded cost. Several simple cases are analyzed for validation and a general complex process flow is used to demonstrate the applicability of the algorithm.

[1]  M. R. Driels,et al.  Analysis of alternative rework strategies for printed wiring assembly manufacturing systems , 1991 .

[2]  Alden H. Wright,et al.  Genetic Algorithms for Real Parameter Optimization , 1990, FOGA.

[3]  Abhijit Chatterjee,et al.  Efficient instruction-level optimization methodology for low-power embedded systems , 2001, International Symposium on System Synthesis (IEEE Cat. No.01EX526).

[4]  Nageswara S. V. Rao On Parallel Algorithms for Single-Fault Diagnosis in Fault Propagation Graph Systems , 1996, IEEE Trans. Parallel Distributed Syst..

[5]  Gary Chartrand,et al.  Applied and algorithmic graph theory , 1992 .

[6]  Brown,et al.  Defect Level as a Function of Fault Coverage , 1981, IEEE Transactions on Computers.

[7]  Anthony P. Ambler,et al.  Economics modelling for the determination of test strategies for complex VLSI boards , 1993, Proceedings of IEEE International Test Conference - (ITC).

[8]  Prabhakar Goel Test generation costs analysis and projections , 1980, DAC '80.

[9]  Tom Chen,et al.  Defects, fault coverage, yield and cost, in board manufacturing , 1994, Proceedings., International Test Conference.

[10]  Peter Sandborn,et al.  On the use of yielded cost in modeling electronic assembly processes , 2001 .

[11]  Kazuhiro Nakahashi,et al.  Wing design using real-coded adaptive range genetic algorithm , 1999, IEEE SMC'99 Conference Proceedings. 1999 IEEE International Conference on Systems, Man, and Cybernetics (Cat. No.99CH37028).

[12]  Robert E. Tarjan,et al.  Depth-First Search and Linear Graph Algorithms , 1972, SIAM J. Comput..

[13]  Hans G. Kerkhoff,et al.  Tackling test trade-offs from design, manufacturing to market using economic modeling , 2001, Proceedings International Test Conference 2001 (Cat. No.01CH37260).

[14]  Wojciech Maly,et al.  Modeling the Economics of Testing: A DFT Perspective , 2002, IEEE Des. Test Comput..

[15]  Peter Sandborn,et al.  A new test/diagnosis/rework model for use in technical cost modeling of electronic systems assembly , 2001, Proceedings International Test Conference 2001 (Cat. No.01CH37260).

[16]  Zbigniew Michalewicz,et al.  An Experimental Comparison of Binary and Floating Point Representations in Genetic Algorithms , 1991, ICGA.

[17]  Magdy S. Abadir,et al.  High Level Test Economics Advisor (Hi-TEA) , 1994, J. Electron. Test..

[18]  Randy L. Haupt,et al.  Practical Genetic Algorithms , 1998 .

[19]  Patrick D.T. O'Connor The Economics of Automatic Testing , 1983 .