Logic circuits from zero forcing

We design logic circuits based on the notion of zero forcing on graphs; each gate of the circuits is a gadget in which zero forcing is performed. We show that such circuits can evaluate every monotone Boolean function. By using two vertices to encode each logical bit, we obtain universal computation. We also highlight a phenomenon of “back forcing” as a property of each function. Such a phenomenon occurs in a circuit when the input of gates which have been already used at a given time step is further modified by a computation actually performed at a later stage. Finally, we show that zero forcing can be also used to implement reversible computation. The model introduced here provides a potentially new tool in the analysis of Boolean functions, with particular attention to monotonicity. Moreover, in the light of applications of zero forcing in quantum mechanics, the link with Boolean functions may suggest a new directions in quantum control theory and in the study of engineered quantum spin systems. It is an open technical problem to verify whether there is a link between zero forcing and computation with contact circuits.

[1]  Vittorio Giovannetti,et al.  Full control by locally induced relaxation. , 2007, Physical review letters.

[2]  Erik D. Demaine,et al.  Any monotone boolean function can be realized by interlocked polygons , 2010, CCCG.

[3]  Noga Alon,et al.  The monotone circuit complexity of boolean functions , 1987, Comb..

[4]  Ashkan Aazami,et al.  Hardness results and approximation algorithms for some problems on graphs , 2008 .

[5]  W. Haemers Zero forcing sets and minimum rank of graphs , 2008 .

[6]  Tommaso Toffoli,et al.  Reversible Computing , 1980, ICALP.

[7]  Erik D. Demaine,et al.  Any Monotone Function Is Realized by Interlocked Polygons , 2012, Algorithms.

[8]  Simone Severini,et al.  Zero Forcing, Linear and Quantum Controllability for Systems Evolving on Networks , 2011, IEEE Transactions on Automatic Control.

[9]  Robert Wille,et al.  From Truth Tables to Programming Languages: Progress in the Design of Reversible Circuits , 2011, 2011 41st IEEE International Symposium on Multiple-Valued Logic.

[10]  Sos S. Agaian,et al.  New digit-serial implementations of stack filters , 1997, Signal Process..

[11]  Igor L. Markov,et al.  Synthesis and optimization of reversible circuits—a survey , 2011, CSUR.

[12]  T. Toffoli,et al.  Conservative logic , 2002, Collision-Based Computing.

[13]  Hong-Jian Lai,et al.  Large Survivable Nets and the Generalized Prisms , 1995, Discret. Appl. Math..

[14]  Simone Severini,et al.  Nondiscriminatory propagation on trees , 2008, 0805.0181.

[15]  Paul M. B. Vitányi Time, space, and energy in reversible computing , 2005, CF '05.

[16]  Vittorio Giovannetti,et al.  Local controllability of quantum networks , 2009 .

[17]  Carl A. Gunter,et al.  In handbook of theoretical computer science , 1990 .