Fibre channel is a gigabit-speed network technology which dominates todaypsilas high-end storage network market. Its topology consists of several layers. This paper presents a transceiver design with FS-HSPI compliant interface used for Fibre Channel Transmission Protocol Layer.. or FC-1 layer. Optimized 8B/10B encoder/decoder architecture and parallel CRC checking algorithm are used in order to satisfy high-speed requirements and ensure reliability during transmission. By providing DDR/SDR interface, the transceiver can support both 1.0625 Gbit/s and 2.125 Gbit/s transmission rate. FIFO buffering and clock correction technique are used to accommodate the rate difference between recovered clock and receiver clock. Synthesis results using Synopsys Design Compiler in SMIC 0.18 um technology shows our design can reach the required baud rate.
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