Ad Hoc network has the characteristics of self-organization and dynamic topology, so it can use polling strategy for data collection. In this paper, the data link layer of the Ad Hoc network data acquisition system has been carried out the detailed analysis and study, through the use of polling policy in the access network node to solve the problem of competition for resources and allocation mechanism in the network link, and improve the channel utilization and system stability. The design based on VHDL language to achieve RTL-level description of the Ad Hoc network data acquisition system, and Altera Corporation EP2C35F672C6 as target chip, and in the Quartus II platform 8.0 conducts synthesis, placement, routing, and comprehensive simulation, and finally inDE2 the experimental board download is verified. The entire hardware design is of simple structure, reliable high, real-time, and can be widely used in the field of sensor networks and mobile communications network.
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