5.5 V tolerant I/O in a 2.5 V 0.25 /spl mu/m CMOS technology

Robust high-voltage tolerant I/O that does not need process options is presented, demonstrated on 5.5 V tolerant open-drain I/O in a 2.5 V 0.25 /spl mu/m CMOS technology. Circuit techniques limit oxide stress and hot-carrier degradation, resulting in hundreds of years extrapolated lifetime for 5.5 V pad voltage swing, 2.2 V supply voltage, 10 MHz switching frequency. The shown concepts are also implemented in other types of I/O and can easily be scaled towards newer processes.

[1]  C. Hu Gate oxide scaling limits and projection , 1996 .

[2]  E. C. Dijkmans,et al.  A 3/5 V compatible I/O buffer , 1995 .

[3]  R. Woltjer,et al.  Universal description of hot-carrier-induced interface states in NMOSFETs , 1992, 1992 International Technical Digest on Electron Devices Meeting.