Power aware page allocation

One of the major challenges of post-PC computing is the need to reduce energy consumption, thereby extending the lifetime of the batteries that power these mobile devies. Memory is a particularly important target for efforts to improve energy efficiency. Memory technology is becoming available that offers power management features such as the ability to put individual chips in any one of several different power modes. In this paper we explore the interaction of page placement with static and dynamic hardware policies to exploit these emerging hardware features. In particular, we consider page allocation policies that can be employed by an informed operating system to complement the hardware power management strategies. We perform experiments using two complementary simulation environments: a trace-driven simulator with workload traces that are representative of mobile computing and an execution-driven simulator with a detailed processor/memory model and a more memory-intensive set of benchmarks (SPEC2000). Our results make a compelling case for a cooperative hardware/software approach for exploiting power-aware memory, with down to as little as 45% of the Energy Delay for the best static policy and 1% to 20% of the Energy Delay for a traditional full-power memory.

[1]  Amin Vahdat,et al.  Every joule is precious: the case for revisiting operating system design for energy efficiency , 2000, ACM SIGOPS European Workshop.

[2]  Amin Vahdat,et al.  Managing the storage and battery resources in an image capture device (digital camera) using dynamic transcoding , 2000, WOWMOM '00.

[3]  Jason Flinn,et al.  Quantifying the energy consumption of a pocket computer and a Java virtual machine , 2000, SIGMETRICS '00.

[4]  Carla Schlatter Ellis,et al.  The case for higher-level power management , 1999, Proceedings of the Seventh Workshop on Hot Topics in Operating Systems.

[5]  Mahadev Satyanarayanan,et al.  PowerScope: a tool for profiling the energy usage of mobile applications , 1999, Proceedings WMCSA'99. Second IEEE Workshop on Mobile Computing Systems and Applications.

[6]  Philip M. Long,et al.  Adaptive Disk Spindown via Optimal Rent-to-Buy in Probabilistic Environments , 1999, Algorithmica.

[7]  Robin Kravets,et al.  Power management techniques for mobile communication , 1998, MobiCom '98.

[8]  Kazuaki Murakami,et al.  Optimizing the DRAM refresh count for merged DRAM/logic LSIs , 1998, Proceedings. 1998 International Symposium on Low Power Electronics and Design (IEEE Cat. No.98TH8379).

[9]  Thomas D. Burd,et al.  The simulation and evaluation of dynamic voltage scaling algorithms , 1998, Proceedings. 1998 International Symposium on Low Power Electronics and Design (IEEE Cat. No.98TH8379).

[10]  Ibrahim N. Hajj,et al.  Architectural and compiler support for energy reduction in the memory hierarchy of high performance microprocessors , 1998, Proceedings. 1998 International Symposium on Low Power Electronics and Design (IEEE Cat. No.98TH8379).

[11]  Hugo De Man,et al.  Power exploration for dynamic data types through virtual memory management refinement , 1998, Proceedings. 1998 International Symposium on Low Power Electronics and Design (IEEE Cat. No.98TH8379).

[12]  A. Klauser,et al.  Pipeline gating: speculation control for energy reduction , 1998, Proceedings. 25th Annual International Symposium on Computer Architecture (Cat. No.98CB36235).

[13]  B. Bershad,et al.  Execution characteristics of desktop applications on Windows NT , 1998, Proceedings. 25th Annual International Symposium on Computer Architecture (Cat. No.98CB36235).

[14]  Alan Jay Smith,et al.  Scheduling techniques for reducing processor energy use in MacOS , 1997, Wirel. Networks.

[15]  Tomás Lang,et al.  Reducing TLB power requirements , 1997, Proceedings of 1997 International Symposium on Low Power Electronics and Design.

[16]  Robert Michael Owens,et al.  Analysis of power consumption in memory hierarchies , 1997, Proceedings of 1997 International Symposium on Low Power Electronics and Design.

[17]  Mary Jane Irwin,et al.  Techniques for low energy software , 1997, Proceedings of 1997 International Symposium on Low Power Electronics and Design.

[18]  Tomás Lang,et al.  Exploiting the locality of memory references to reduce the address bus energy , 1997, Proceedings of 1997 International Symposium on Low Power Electronics and Design.

[19]  Randy H. Katz,et al.  Measuring and Reducing Energy Consumption of Network Interfaces in Hand-Held Devices (Special Issue on Mobile Computing) , 1997 .

[20]  Thomas D. Burd,et al.  Processor design for portable systems , 1996, J. VLSI Signal Process..

[21]  Darrell D. E. Long,et al.  A dynamic disk spin-down technique for mobile computing , 1996, MobiCom '96.

[22]  Alan Jay Smith,et al.  Reducing processor power consumption by improving processor time management in a single-user operating system , 1996, MobiCom '96.

[23]  Anoop Gupta,et al.  Operating system support for improving data locality on CC-NUMA compute servers , 1996, ASPLOS VII.

[24]  Mark Horowitz,et al.  Energy dissipation in general purpose microprocessors , 1996, IEEE J. Solid State Circuits.

[25]  Doug Burger,et al.  Evaluating Future Microprocessors: the SimpleScalar Tool Set , 1996 .

[26]  Philip M. Long,et al.  Learning to Make Rent-to-Buy Decisions with Systems Applications , 1995, ICML.

[27]  Brian N. Bershad,et al.  Reducing TLB and memory overhead using online superpage promotion , 1995, Proceedings 22nd Annual International Symposium on Computer Architecture.

[28]  Tomasz Imielinski,et al.  Energy Efficient Data Filtering and Communication in Mobile Wireless Computing , 1995, Symposium on Mobile and Location-Independent Computing.

[29]  Fred Douglis,et al.  Adaptive Disk Spin-Down Policies for Mobile Computers , 1995, Comput. Syst..

[30]  Mahadev Satyanarayanan,et al.  A Programming Interface for Application-Aware Adaptation in Mobile Computing , 1995, Comput. Syst..

[31]  Scott Shenker,et al.  Scheduling for reduced CPU energy , 1994, OSDI '94.

[32]  Kai Li,et al.  Storage alternatives for mobile computers , 1994, OSDI '94.

[33]  Andrew Wolfe,et al.  Power Analysis Of Embedded Software: A First Step Towards Software Power Minimization , 1994, IEEE/ACM International Conference on Computer-Aided Design.

[34]  Brian N. Bershad,et al.  Avoiding conflict misses dynamically in large direct-mapped caches , 1994, ASPLOS VI.

[35]  Andrew Wolfe,et al.  Compilation techniques for low energy: an overview , 1994, Proceedings of 1994 IEEE Symposium on Low Power Electronics.

[36]  Paul Horton,et al.  A Quantitative Analysis of Disk Drive Power Management in Portable Computers , 1994, USENIX Winter.

[37]  P. Krishnan,et al.  Thwarting the Power-Hungry Disk , 1994, USENIX Winter.

[38]  Richard E. Kessler,et al.  Page placement algorithms for large real-indexed caches , 1992, TOCS.

[39]  Mary Baker,et al.  Non-volatile memory for fast, reliable file systems , 1992, ASPLOS V.

[40]  Carla Schlatter Ellis,et al.  Experimental comparison of memory management policies for NUMA multiprocessors , 1991, TOCS.

[41]  Carla Schlatter Ellis,et al.  The robustness of NUMA memory management , 1991, SOSP '91.

[42]  Robert J. Fowler,et al.  The implementation of a coherent memory abstraction on a NUMA multiprocessor: experiences with platinum , 1989, SOSP '89.

[43]  Michael L. Scott,et al.  Simple but effective techniques for NUMA memory management , 1989, SOSP '89.

[44]  Anna R. Karlin,et al.  Competitive snoopy caching , 1986, 27th Annual Symposium on Foundations of Computer Science (sfcs 1986).