Scaling and Technology Issues for Soft Error Rates

The effects of device technology and scaling on soft error rates are discussed, using information obtained from both the device and space communities as a guide to determine the net effect on soft errors. Recent data on upset from high- energy protons indicates that the soft-error problem in DRAMs and microprocessors is less severe for highly scaled devices, in contrast to expectations. Possible improvements in soft-error rate for future devices, manufactured with silicon-on-insulator technology, are also discussed. I. INTRODUCTION Soft-errors from alpha particles were first reported by May and Woods (1), and considerable effort was spent by the semiconductor device community during the ensuing years to deal with the problem of errors from alpha particles in packaging, metallization and other materials. This included modifications in device design to reduce the inherent sensitivity to extraneous charge, as well as application of topical shielding and improvements in material purity. Atmospheric neutrons can also produce soft errors. One example is shown in Figure 1, after Lage, et al.(2), which shows the increase in measured soft error rate when experiments were done on SRAMs using alpha sources with different intensities. The increased error rate is due to the presence of atmospheric neutrons that have a larger relative influence when alpha experiments are done for long time periods using low-intensity sources.

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