Embedded memory options for ultra-low power IoT devices

Abstract The Internet of Things (IoT) connects everyday devices to the internet to gather information using sensors and embedded systems. Emerging low power for Internet of Things wearables, and medical electronic devices has an ultimate goal to reduce overall system power and increase battery life. These applications require efficient memory solutions. Ultra-low energy dissipation for Internet of things devices enables prolonged battery life. Minimizing energy consumption requires correct architectural choice. This paper presents the selection of memory options for Ultra-low power IoT devices. Three type of memories which are flip-flop base memory, latch-based memory and SRAM based memory has been evaluated for 65 nm low power foundry technology. The result of the study shown that latch based memory has better resource utilization in terms of power−area product. The latch based RAM saved 60% in power-area product, relative to an SRAM based memory and more than 90% relative to a flip-flop based RAM. The study is targeting wearable electronics for ECG monitoring which requires 2 KB of RAM.

[1]  Arijit Banerjee Ultra-Low-Power Embedded SRAM Design for Battery- Operated and Energy-Harvested IoT Applications , 2018 .

[2]  Longxing Shi,et al.  A Double Sensing Scheme With Selective Bitline Voltage Regulation for Ultralow-Voltage Timing Speculative SRAM , 2018, IEEE Journal of Solid-State Circuits.

[3]  Mohammed Ismail,et al.  Design Methodologies for Yield Enhancement and Power Efficiency in SRAM-Based SoCs , 2015, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[4]  Mohammed Ismail,et al.  A Nanowatt Real-Time Cardiac Autonomic Neuropathy Detector , 2018, IEEE Transactions on Biomedical Circuits and Systems.

[5]  Jacob A. Abraham,et al.  A reduced voltage swing circuit using a single supply to enable lower voltage operation for SRAM-based memory , 2012, Microelectron. J..

[6]  Jinn-Shyan Wang,et al.  A 0.2 V 32-Kb 10T SRAM With 41 nW Standby Power for IoT Applications , 2018, IEEE Transactions on Circuits and Systems I: Regular Papers.

[7]  Oskar Andersson,et al.  Ultra Low Voltage Synthesizable Memories: A Trade-Off Discussion in 65 nm CMOS , 2016, IEEE Transactions on Circuits and Systems I: Regular Papers.

[8]  Tarek M. Taha,et al.  On-Chip Power Minimization Using Serialization-Widening with Frequent Value Encoding , 2014, VLSI Design.

[9]  Baker Mohammad,et al.  A 65-nm pulsed latch with a single clocked transistor , 2007, Proceedings of the 2007 international symposium on Low power electronics and design (ISLPED '07).