Power delivery network analysis of 3D double-side glass interposers for high bandwidth applications

Logic-to-memory interconnections by double-side mounting on ultra-thin 3D glass interposers with Through-Package-Vias (TPVs) achieves high bandwidth (BW) (>25.6GB per second), without the complex TSV processes in logic ICs, required for wide I/O 3D-IC stack. While this interposer/packaging technology offers several advantages including power delivery by enabling thick power-ground (P/G) planes, the power distribution network (PDN) challenges such as resonances must be addressed. This paper investigates the impedance characteristics of PDN in 3D glass interposers at chip, interposer, package, and board-levels. The resonance characteristics of power and ground planes in ultra-thin glass packages are compared with other interposer technologies through 3D EM simulations with variations in core thickness. Test vehicles fabricated with 10×10mm power-ground plane pairs on ultra-thin 30μm glass samples were characterized for primary resonance modes, with good model-to-hardware correlation. Self-impedance (Z11) was studied with variations in (a) number of power and ground BGA interconnections, (b) power and ground path distance, and (c) placement of decoupling capacitors. In all these three cases, the contribution of increased package-level loop inductance to total system level impedance (on-chip + interposer/package + PWB PDN) was shown to be minimal. Thus, through a combination of integrated power and ground planes, decoupling capacitors, and optimal power-ground BGA interconnection placements, ultra-thin 3D glass interposers can achieve the target impedance guidelines for high BW systems.

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