Design of real-time image compression system based on DSP and FPGA

Based on high-frequency frame camera, a high-frequency frame real-time image compression technology is proposed, By combining the TMS320CDM642 and EP2C35 FPGA, this paper designs a high-frequency frame real-time image processor hardware system. The system uses two ping-pong SRAM structures, and on the basis of TI’s DSP/BIOS and the JPEG2000 compression algorithm be support for XDAIS, it realizes the compression rate of 100 per second. The system of image compression while addressing the capacity and the speed of the experimental process of collecting and compression simultaneously, greatly improves the speed of image compression.