Using charged device model testing to eliminate real-world ESD failures

Abstract Of 30 bipolar, BiCMOS, and CMOS monolithic, integrated circuit products that were ESD classified to the socketed Charged Device Model (CDM), 27 had ≥500 V withstand voltages and experienced no real-world CDM failures. Two of the three focus products with Once the physics of CDM failure on the three focus products were fully understood, the ESD redesigns were relatively straightforward. On all three products, diffused series resistors and/or clamping devices with fast response times were added to the pins with inadequate CDM robustness. For each product, these redesigns boosted the socketed CDM withstand voltages for the previously susceptible pins to ≥1500 V and eliminated real-world CDM failures. Based on this work, a combined socketed and non-socketed CDM test approach is proposed for classifying/evaluating products and driving CDM robustness improvements. Guidelines for CDM testing and CDM improvement programs are also provided.