MIP-based detailed placer for mixed-size circuits

By modifying an existing Mixed Integer Programming (MIP) model for optimizing the placement of cells in sliding windows, we develop a detailed placer for large-scale mixed-size circuits. To make it possible to optimize the placement of larger sliding windows in reasonable time, we reduce the number of integer variables in the modified MIP model such that when compared with the original complete MIP model, the solution time is shortened greatly while the solution quality does not degrade much. Experimental results on DAC12 benchmark circuits show that our detailed placer manages to further reduce half-perimeter wirelength (HPWL) of the placement results generated by many other existing detailed placement techniques. Moreover, by making use of a commercial router, we also evaluate the routability of the placement results before and after the application of our detailed placer. Both the routed wirelength and the number of vias in routing solutions are reduced, while the number of design rule violations does not change much for most circuits, implying the routablity of placement results are not perturbed.

[1]  François Vanderbeck,et al.  On Dantzig-Wolfe Decomposition in Integer Programming and ways to Perform Branching in a Branch-and-Price Algorithm , 2000, Oper. Res..

[2]  Jason Cong,et al.  Routability-driven placement and white space allocation , 2004, IEEE/ACM International Conference on Computer Aided Design, 2004. ICCAD-2004..

[3]  Yao-Wen Chang,et al.  Routability-driven analytical placement for mixed-size circuit designs , 2011, 2011 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

[4]  Cheng-Kok Koh,et al.  Mixed integer programming models for detailed placement , 2012, ISPD '12.

[5]  Yao-Wen Chang,et al.  NTUplace3: An Analytical Placer for Large-Scale Mixed-Size Designs With Preplaced Blocks and Density Constraints , 2008, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[6]  Natarajan Viswanathan,et al.  The DAC 2012 routability-driven placement contest and benchmark suite , 2012, DAC Design Automation Conference 2012.

[7]  Jarrod A. Roy,et al.  The ISPD-2011 routability-driven placement contest and benchmark suite , 2011, ISPD '11.

[8]  Natarajan Viswanathan,et al.  ICCAD-2012 CAD contest in design hierarchy aware routability-driven placement and benchmark suite , 2012, 2012 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

[9]  Cheng-Kok Koh,et al.  Optimization of placement solutions for routability , 2013, 2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC).

[10]  Cheng-Kok Koh,et al.  Case study for placement solutions in ispd11 and dac12 routability-driven placement contests , 2013, ISPD '13.

[11]  Jens Vygen.  Algorithms for detailed placement of standard cells , 1998, Proceedings Design, Automation and Test in Europe.

[12]  Cheng-Kok Koh,et al.  A parallel branch-and-cut approach for detailed placement , 2011, TODE.

[13]  Chris C. N. Chu,et al.  An efficient and effective detailed placement algorithm , 2005, ICCAD-2005. IEEE/ACM International Conference on Computer-Aided Design, 2005..

[14]  Jin Hu,et al.  A SimPLR method for routability-driven placement , 2011, 2011 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

[15]  Tao Huang,et al.  Ripple: An effective routability-driven placer by iterative cell movement , 2011, 2011 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

[16]  Cheng-Kok Koh,et al.  Analytical placement of mixed-size circuits for better detailed-routability , 2014, 2014 19th Asia and South Pacific Design Automation Conference (ASP-DAC).

[17]  Cheng-Kok Koh,et al.  Guiding global placement with wire density , 2008, ICCAD 2008.

[18]  Majid Sarrafzadeh,et al.  Routability driven white space allocation for fixed-die standard-cell placement , 2002, ISPD '02.

[19]  Andrew B. Kahng,et al.  Optimization of linear placements for wirelength minimization with free sites , 1999, Proceedings of the ASP-DAC '99 Asia and South Pacific Design Automation Conference 1999 (Cat. No.99EX198).

[20]  Martin W. P. Savelsbergh,et al.  Branch-and-Price: Column Generation for Solving Huge Integer Programs , 1998, Oper. Res..

[21]  P.H. Madden,et al.  On structure and suboptimality in placement , 2005, Proceedings of the ASP-DAC 2005. Asia and South Pacific Design Automation Conference, 2005..

[22]  K. Srihari,et al.  Optimal placement by branch-and-price , 2005, Proceedings of the ASP-DAC 2005. Asia and South Pacific Design Automation Conference, 2005..