Real-time implementation of 4.4 Gbit=s QPSK intradyne receiver using field programmable gate array

A report is made on the real-time implementation of a QPSK intradyne receiver at a data rate of 4.4 Gbit/s. Both block phase estimation and differential detection were successfully demonstrated in combination with a frequency estimation algorithm with bit error ratios well below the threshold of modern forward error correction codes

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