Improved force-directed scheduling in high-throughput digital signal processing

This paper discusses improved force-directed scheduling and its application in the design of high-throughput DSP systems, such as real-time video VLSL circuits. We present a mathematical justification of the technique of force-directed scheduling, introduced by Paulin and Knight (1989), and we show how the algorithm can be used to find cost-effective time assignments and resource allocations, allowing trade-offs between processing units and memories. Furthermore, we present modifications that improve the effectiveness and the efficiency of the algorithm. The significance of the improvements is illustrated by an empirical performance analysis based on a number of problem instances. >

[1]  J. Huisman The Netherlands , 1996, The Lancet.

[2]  Taewhan Kim,et al.  A scheduling algorithm for conditional resource sharing , 1991, 1991 IEEE International Conference on Computer-Aided Design Digest of Technical Papers.

[3]  H. De Man,et al.  Automated synthesis of a high speed Cordic algorithm with the Cathedral-III compilation system , 1988, 1988., IEEE International Symposium on Circuits and Systems.

[4]  Emile H. L. Aarts,et al.  Efficiency improvements for force-directed scheduling , 1992, ICCAD.

[5]  Wim F. J. Verhaegh,et al.  Hierarchical Retiming Including Pipelining , 1991, VLSI.

[6]  W.F.J. Verhaegh,et al.  Flexible datapath compilation for Phideo , 1991, Euro ASIC '91.

[7]  M.C. McFarland Using Bottom-Up Design Techniques in the Synthesis of Digital Hardware from Abstract Behavioral Descriptions , 1986, 23rd ACM/IEEE Design Automation Conference.

[8]  Gaetano Borriello,et al.  High-level synthesis: current status and future directions , 1988, 25th ACM/IEEE, Design Automation Conference.Proceedings 1988..

[9]  Peter B. Denyer,et al.  A new approach to pipeline optimisation , 1990, Proceedings of the European Design Automation Conference, 1990., EDAC..

[10]  Leon Stok,et al.  Architectural synthesis and optimization of digital systems , 1991 .

[11]  Gerald E. Sobelman,et al.  Singleport/multiport memory synthesis in data path design , 1990, IEEE International Symposium on Circuits and Systems.

[12]  Jeffrey D. Ullman,et al.  NP-Complete Scheduling Problems , 1975, J. Comput. Syst. Sci..

[13]  Pascal Van Hentenryck,et al.  A Generic Arc-Consistency Algorithm and its Specializations , 1992, Artif. Intell..

[14]  W.F.J. Verhaegh,et al.  Memory synthesis for high speed DSP applications , 1991, Proceedings of the IEEE 1991 Custom Integrated Circuits Conference.

[15]  Pierre G. Paulin,et al.  Force-directed scheduling for the behavioral synthesis of ASICs , 1989, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[16]  Mohamed I. Elmasry,et al.  Global optimization approach for architectural synthesis , 1990, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[17]  A. Olah,et al.  Scheduling and allocation for the high-level synthesis of DSP algorithms by exploitation of data transfer mobility , 1992, CompEuro 1992 Proceedings Computer Systems and Software Engineering.

[18]  John P. Knight,et al.  Operations research in the high-level synthesis of integrated circuits , 1993, Comput. Oper. Res..

[19]  Jos Huisken,et al.  PHIDEO: a silicon compiler for high speed algorithms , 1991, Proceedings of the European Conference on Design Automation..

[20]  Donald E. Thomas,et al.  The combination of scheduling, allocation, and mapping in a single algorithm , 1991, DAC '90.

[21]  Jan Karel Lenstra,et al.  Periodic Multiprocessor Scheduling , 1991, PARLE.

[22]  P.G. Paulin,et al.  Algorithms for high-level synthesis , 1989, IEEE Design & Test of Computers.

[23]  Alice C. Parker,et al.  Sehwa: a software package for synthesis of pipelines from behavioral specifications , 1988, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[24]  Kees M. van Hee,et al.  Randomized constraint satisfaction for job shop scheduling , 1993, International Joint Conference on Artificial Intelligence.

[25]  Charles E. Leiserson,et al.  Optimizing Synchronous Circuitry by Retiming (Preliminary Version) , 1983 .

[26]  Alice C. Parker,et al.  Tutorial on high-level synthesis , 1988, DAC '88.

[27]  Emile H. L. Aarts,et al.  Improved force-directed scheduling , 1991, Proceedings of the European Conference on Design Automation..

[28]  Mohamed I. Elmasry,et al.  A global optimization approach for architectural synthesis , 1990, 1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers.

[29]  Alice C. Parker,et al.  The high-level synthesis of digital systems , 1990, Proc. IEEE.

[30]  Wim F. J. Verhaegh,et al.  Architectural strategies for high-throughput applications , 1993, J. VLSI Signal Process..

[31]  Phn Peter Motion-adaptive intraframe transform coding of video signals , 1989 .

[32]  Yu-Chin Hsu,et al.  A formal approach to the scheduling problem in high level synthesis , 1991, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[33]  A. H. Timmer,et al.  Module selection and scheduling using unrestricted libraries , 1993, 1993 European Conference on Design Automation with the European Event in ASIC Design.

[34]  Arun K. Majumdar,et al.  Allocation of multiport memories in data path synthesis , 1988, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[35]  Hugo De Man,et al.  Architecture-driven synthesis techniques for VLSI implementation of DSP algorithms , 1990, Proc. IEEE.

[36]  Pierre Gaston Paulin High-level synthesis of digital circuits using global scheduling and binding algorithms , 1988 .

[37]  Miodrag Potkonjak,et al.  Resource driven synthesis in the HYPER system , 1990, IEEE International Symposium on Circuits and Systems.

[38]  Pierre G. Paulin,et al.  Force-Directed Scheduling in Automatic Data Path Synthesis , 1987, 24th ACM/IEEE Design Automation Conference.

[39]  Rina Dechter,et al.  Network-Based Heuristics for Constraint-Satisfaction Problems , 1987, Artif. Intell..

[40]  Eugene C. Freuder,et al.  The Complexity of Constraint Satisfaction Revisited , 1993, Artif. Intell..

[41]  David S. Johnson,et al.  Computers and Intractability: A Guide to the Theory of NP-Completeness , 1978 .