An optimizing compiler for configurable logic

Sea Cucumber (SC) is an optimizing and synthesizing compiler for Field Programmable Gate Arrays (FPGAs) that accepts Java class files as input (generated from Java source files) and that generates circuits that exploit the coarse- and fine-grained parallelism available in the input class files. Programmers determine the level of coarse-grained parallelism available by organizing their design as a set of inter-communicating, concurrent threads (using standard Java threads) that are synthesized by SC as concurrent hardware. SC automatically extracts fine-grained parallelism from the body of each thread by processing the bytecodes contained in the input class files and employing conventional compiler optimizations such as data-flow and control-flow graph analysis, dead-code elimination, constant folding, operation simplification, predicated static single assignment, if-conversion, hyperblock formation, etc. The resulting EDIF files can be processed using Xilinx place and route software to produce bitstreams that can be downloaded into FPGAs for execution. SC establishes three goals to be used to measure its success: high performance, maximum parallelism extraction and algorithmic specification. High performance is achieved in the benchmarks designs used. Using both software and hardware techniques, SC obtains a high degree of parallelism extraction. The use of Java and software programming techniques makes SC algorithmic in its specification of circuit designs. Achieving these goals makes SC a powerful and flexible tool for FPGA circuit synthesis.