We have fabricated high-performance amorphous silicon thin-film transistors (a-Si:H TFTs) on 2 mil. (51 μm) thick polyimide foil substrates. The TFT structure was deposited by r.f.-excited plasma enhanced chemical vapor deposition (PECVD). All TFT layers, including the gate silicon nitride, the undoped, and the n+ amorphous silicon were deposited at a substrate temperature of 150 °C. The transistors have inverted-staggered back-channel etch structure. The TFT off-current is approximately 10-12 A, the on-off current ratio is >107, the threshold voltage is 3.5 V, the sub-threshold slope is approximately 0.5 V/decade, and the linear-regime mobility is approximately 0.5 cm2 V-1 s-1. We compare the mechanical behavior of a thin film on a stiff and on a compliant substrate. The thin film stress can be reduced to one half by changing from a stiff to a compliant substrate. A new equation is developed for the radius of curvature of thin films on compliant substrates.
[1]
John R Abelson,et al.
An amorphous silicon thin film transistor fabricated at 125 °C by dc reactive magnetron sputtering
,
1997
.
[2]
A. Evans,et al.
The thermomechanical integrity of thin films and multilayers
,
1995
.
[3]
Subra Suresh,et al.
Small and large deformation of thick and thin-film multi-layers: Effects of layer geometry, plasticity and compositional gradients
,
1996
.
[4]
S. Timoshenko,et al.
Theory of elasticity
,
1975
.
[5]
M. Feng,et al.
Effects of Plasma Enhanced Chemical Vapor Deposition Substrate Heating on the Electrical Properties of α‐Si:H Thin Film Transistors
,
1994
.
[6]
S. Wagner,et al.
Amorphous and microcrystalline silicon technology -- 1998
,
1999
.