Compilation techniques for low energy: an overview

Recent years have witnessed a rapid growth in research activity targeted at reducing energy consumption in microprocessor based systems. However, this research has by and large not recognised the potential energy savings achievable through optimization of software running on the microprocessor. This paper presents an overview of techniques used in our work and in other recent research in this area. Several possible techniques for energy reduction through code compilation are presented. Examples with energy reduction of up to 40% on an Intel 486DX2 based system, obtained by rewriting code, demonstrate the potential of these ideas. Several additional avenues for reducing CPU and memory system energy through code compilation are identified. The effect of traditional compilation techniques on energy reduction is discussed and some of these techniques that can be beneficial in this regard are reviewed.

[1]  Sharad Malik,et al.  Power analysis of embedded software: a first step towards software power minimization , 1994, ICCAD.

[2]  Chi-Ying Tsui,et al.  Low power architecture design and compilation techniques for high-performance processors , 1994, Proceedings of COMPCON '94.

[3]  Jack W. Davidson,et al.  Memory access coalescing: a technique for eliminating redundant memory accesses , 1994, PLDI '94.

[4]  Sally A. McKee,et al.  Access ordering and memory-conscious cache utilization , 1995, Proceedings of 1995 1st IEEE Symposium on High Performance Computer Architecture.

[5]  Alfred V. Aho,et al.  Compilers: Principles, Techniques, and Tools , 1986, Addison-Wesley series in computer science / World student series edition.

[6]  H. De Man,et al.  Global communication and memory optimizing transformations for low power signal processing systems , 1994, Proceedings of 1994 IEEE Workshop on VLSI Signal Processing.

[7]  Manuel E. Benitez,et al.  A Retargetable Integrated Code Improver , 1993 .