Optimization criteria for SRAM design: lithography contribution

Here we discuss the use of well calibrated resist and etch bias models, in conjunction with a fast microlithography aerial image simulator, to predict and 'optimize' the printed shapes through all critical levels in a dense SRAM design. Our key emphasis here is on 'optimization criteria', namely, having achieved good predictability for printability with lithography models, how to use this capability in conjunction of best electrical performance, yield, and density. The key lithography/design optimization issues discussed here are: (1) tightening of gate width variation by reducing spatial curvature in the source and drain regions, (2) achieving sufficient contact areas, (3) maximizing process window for overlay, (4) reducing leakage mechanisms by reducing contributions of stress and strain due to the printed shape of oxide isolation regions, (5) examining topological differences in design during the optimization process, (6) accounting for mask corner rounding, and (7) designing for scalability to smaller dimensions to achieve optical design reusability issues without hardware.

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