An approach to architectural enhancement for embedded speech applications

Advances in human computer interaction (HCI) technology has resulted in widespread development of natural language and speech applications. These applications are known to be computationally different from other end-user applications. In this paper, the architectural features of text to speech (TTS) and automatic speech recognition (ASR) applications have been evaluated and cost effective optimal architectural solutions have been suggested. The results have shown that low cost solutions such as ISA extension and feature addition to an existing embedded architecture can lead to appreciable improvement in performance for these applications. This work also presents a design space exploration to suggest an optimized VLIW architecture for TTS and ASR applications.

[1]  Biing-Hwang Juang,et al.  Fundamentals of speech recognition , 1993, Prentice Hall signal processing series.

[2]  Scott A. Mahlke,et al.  Architectural optimizations for low-power, real-time speech recognition , 2003, CASES '03.

[3]  Scott A. Mahlke,et al.  Memory system design space exploration for low-power, real-time speech recognition , 2004, International Conference on Hardware/Software Codesign and System Synthesis, 2004. CODES + ISSS 2004..

[4]  A. Mukhopadhyay,et al.  Shruti: an embedded text-to-speech system for Indian languages , 2006, IEE Proc. Softw..

[5]  Yoram Singer,et al.  The Hierarchical Hidden Markov Model: Analysis and Applications , 1998, Machine Learning.

[6]  Chandra Shekhar,et al.  Design of an application specific instruction set processor for parametric speech synthesis , 2004, 17th International Conference on VLSI Design. Proceedings..

[7]  Roberto Bisiani,et al.  A hardware accelerator for speech recognition algorithms , 1986, ISCA '86.