A neural-network contention controller for packet switching networks

A novel approach to solving the output contention in packet switching networks with synchronous switching mode is presented. A contention controller has been designed based on the K-winner-take-all neural-network technique with a speedup factor to achieve a real-time computation of a nonblocking switching high-speed high-capacity packet switch without packet loss. Simulation results for evaluation of the performance of the K-winner network controller with 10 neurons are presented to study the constraints of the "frozen state" as well as those of same initial state. An optoelectronic contention controller constructed from a K-winner neural network is proposed.