An optimized SVPWM scheme for a thirteen-level inverter

This paper presents an improved Space Vector PWM (SVPWM) strategy for an unusual thirteen-level inverter that has symmetric space vectors with few redundant switching states. In comparison to conventional topologies of multilevel inverters that utilise complex cascade H-bridges with isolated DC sources or Neutral Point Clamped (NPC) circuits, the multi-level inverter presented in this work uses a single DC supply and a three-phase transformer coupling. The improved SVPWM scheme facilitates the location of the reference voltage vector in the space vector plane and the determination of the semiconductor devices switching. The principle of operation of the thirteen-level inverter is analysed, showing how an optimized SVPWM technique was implemented on a low-cost FPGA to operate a 2kW, 13-level inverter prototype, and experimental results are shown to validate the operation of the converter under steady-state and dynamic conditions.