Heuristic techniques for the synthesis of complex functional units

A technique for the synthesis of complex multifunctional units is presented. Given a set of functions, the goal is to minimize the area cost of the functional unit that can execute these functions. The approach is based on heuristic algorithms which make use of bipartite matching combined with an efficient ordering strategy. The experimental results show that a good tradeoff between CPU time and the quality of the design has been obtained.<<ETX>>

[1]  E.H.L. Aarts,et al.  Area optimization of multi-functional processing units , 1992, 1992 IEEE/ACM International Conference on Computer-Aided Design.

[2]  S. C. Johnson Hierarchical clustering schemes , 1967, Psychometrika.

[3]  Hugo De Man,et al.  Definition and assignment of complex data-paths suited for high throughput applications , 1989, 1989 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers.

[4]  Alice C. Parker,et al.  The high-level synthesis of digital systems , 1990, Proc. IEEE.

[5]  Gert Goossens,et al.  An Object-Oriented Framework Supporting the full High-Level Synthesis Trajectory , 1991 .

[6]  Hugo De Man,et al.  Cathedral-III : architecture-driven high-level synthesis for high throughput DSP applications , 1991, 28th ACM/IEEE Design Automation Conference.

[7]  Elke A. Rundensteiner,et al.  Functional synthesis using area and delay optimization , 1992, [1992] Proceedings 29th ACM/IEEE Design Automation Conference.

[8]  Hugo De Man,et al.  Time constrained allocation and assignment techniques for high throughput signal processing , 1992, [1992] Proceedings 29th ACM/IEEE Design Automation Conference.