The microarchitecture has a unique role to play in maintaining continued performance growth, since it combines runtime knowledge of program behaviour with the ability to modify the hardware's behavior-both of which can be tracked and controlled at multiple granularities in space and time. A clear phase behavior in the SPECcpu2000 program mesa, as well as substantial temperature variation across different architectural units is shown. A dynamic compact model can be constructed using only information available in pre-RTL planning stages, namely architecture parameters, floorplan, and geometric and material properties of candidate packages. Thermal-RC pairs are constructed to represent heat flow in both the lateral and vertical directions. Power dissipation in each architecture unit is represented as a current source in the RC circuit and can be modeled using any architectural modeling tool, e.g. IBM's Power Timer. This model has been validated against Micred test chip to within 7% for both steady state and transient behavior and is boundary- and initial-condition independent (BICI). One example of "temperature-aware" architecture is dynamic thermal management (DTM) in conjunction with reducing packaging cost.
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