Constraint-driven communication synthesis

Constraint-driven Communication Synthesis enables the automatic design of the communication architecture of a complex system from a library of pre-defined Intellectual Property (IP) components. The key communication parameters that govern all the point-to-point interactions among system modules are captured as a set of arc constraints in the communication constraint graph. Similarly, the communication features offered by each of the components available in the IP communication library are captured as a set of feature resources together with its cost figures. Then, every communication architecture that can be built using the available components while satisfying all constraints is implicitly considered (as an implementation graph matching the constraint graph) to derive the optimum design solution with respect to the desired cost figure. The corresponding constrained optimization problem is efficiently solved by a novel algorithm that is presented here together with its rigorous theoretical foundations.

[1]  William J. Dally,et al.  Flit-reservation flow control , 2000, Proceedings Sixth International Symposium on High-Performance Computer Architecture. HPCA-6 (Cat. No.PR00550).

[2]  David S. Johnson,et al.  Computers and Intractability: A Guide to the Theory of NP-Completeness , 1978 .

[3]  Jan Madsen,et al.  Integrating communication protocol selection with hardware/software codesign , 1999, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[4]  K. Keutzer,et al.  System-level design: orthogonalization of concerns andplatform-based design , 2000, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[5]  Wayne Wolf,et al.  Communication synthesis for distributed embedded systems , 1995, Proceedings of IEEE International Conference on Computer Aided Design (ICCAD).

[6]  Alberto L. Sangiovanni-Vincentelli,et al.  A methodology for correct-by-construction latency insensitive design , 1999, 1999 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (Cat. No.99CH37051).

[7]  Ahmed Amine Jerraya,et al.  Synthesis of system-level communication by an allocation-based approach , 1995 .

[8]  Robert K. Brayton,et al.  Planning for performance , 1998, Proceedings 1998 Design and Automation Conference. 35th DAC. (Cat. No.98CH36175).

[9]  Srinivas Devadas,et al.  Solving Covering Problems Using LPR-based Lower Bounds , 1997, Proceedings of the 34th Design Automation Conference.

[10]  A. Sangiovanni-Vincentelli,et al.  Constraint-driven communication synthesis , 2002, Proceedings 2002 Design Automation Conference (IEEE Cat. No.02CH37324).

[11]  P.-C. Chang,et al.  Multi-link-speed network topology design , 1992, Eleventh Annual International Phoenix Conference on Computers and Communication [1992 Conference Proceedings].

[12]  Gaetano Borriello,et al.  Communication synthesis for distributed embedded systems , 1998, 1998 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (IEEE Cat. No.98CB36287).

[13]  James H. Lambert,et al.  A Methodology for , 2000 .

[14]  Alberto L. Sangiovanni-Vincentelli,et al.  System-level design: orthogonalization of concerns andplatform-based design , 2000, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[15]  Sujit Dey,et al.  Efficient exploration of the SoC communication architecture design space , 2000, IEEE/ACM International Conference on Computer Aided Design. ICCAD - 2000. IEEE/ACM Digest of Technical Papers (Cat. No.00CH37140).

[16]  Tiziano Villa,et al.  Negative thinking in branch-and-bound: the case of unate covering , 2000, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[17]  Srinivas Devadas,et al.  Solving covering problems using LPR-based lower bounds , 2000, IEEE Trans. Very Large Scale Integr. Syst..