Improving a Test Set to Cover Test Holes by Detecting Gate-Exhaustive Faults

Gate-exhaustive faults were used in an earlier work to address test holes that are created when target faults are undetectable. After test generation for target faults is complete, and undetectable target faults are identified, gate-exhaustive faults are selected for gates with undetectable target faults. Tests for gate-exhaustive faults are then generated and added to the test set. The increase in the number of tests varies significantly with the circuit. This paper studies the use of gate-exhaustive faults for addressing test holes post test generation without increasing the number of tests. The procedure described in this paper modifies tests for target faults so as to increase the coverage of the selected gate-exhaustive faults. Experimental results demonstrate the effectiveness of the procedure.

[1]  Friedrich Hapke,et al.  Introduction to the defect-oriented cell-aware test methodology for significant reduction of DPPM rates , 2012, 2012 17th IEEE European Test Symposium (ETS).

[2]  John P. Hayes,et al.  On the properties of the input pattern fault model , 2003, TODE.

[3]  Jinkyu Lee,et al.  Evaluation of test metrics: stuck-at, bridge coverage estimate and gate exhaustive , 2006, 24th IEEE VLSI Test Symposium.

[4]  Edward J. McCluskey Quality and single-stuck faults , 1993, Proceedings of IEEE International Test Conference - (ITC).

[5]  Irith Pomeranz Iterative Test Generation for Gate-Exhaustive Faults to Cover the Sites of Undetectable Target Faults , 2019, 2019 IEEE International Test Conference (ITC).

[6]  Irith Pomeranz,et al.  Testing for systematic defects based on DFM guidelines , 2007, 2007 IEEE International Test Conference.

[7]  Edward J. McCluskey,et al.  Gate exhaustive testing , 2005, IEEE International Conference on Test, 2005..

[8]  Irith Pomeranz,et al.  Static test compaction for delay fault test sets consisting of broadside and skewed-load tests , 2011, 29th VLSI Test Symposium.