Loop flattening & spherical sampling: Highly efficient model reduction techniques for SRAM yield analysis
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Lara Dolecek | Devavrat Shah | Anantha Chandrakasan | Masood Qazi | Mehul Tikekar | D. Shah | A. Chandrakasan | L. Dolecek | M. Qazi | M. Tikekar
[1] K.J. Kuhn,et al. Reducing Variation in Advanced Logic Technologies: Approaches to Process and Design for Manufacturability of Nanoscale CMOS , 2007, 2007 IEEE International Electron Devices Meeting.
[2] Mohab Anis,et al. A methodology for statistical estimation of read access yield in SRAMs , 2008, 2008 45th ACM/IEEE Design Automation Conference.
[3] Gerardo Rubino,et al. Introduction to Rare Event Simulation , 2009, Rare Event Simulation using Monte Carlo Methods.
[4] Paul D. Franzon,et al. FreePDK: An Open-Source Variation-Aware Design Kit , 2007, 2007 IEEE International Conference on Microelectronic Systems Education (MSE'07).
[5] Lara Dolecek,et al. Breaking the simulation barrier: SRAM evaluation through norm minimization , 2008, 2008 IEEE/ACM International Conference on Computer-Aided Design.
[6] Milík Tichý. Applied Methods of Structural Reliability , 1993 .
[7] Charles M. Grinstead,et al. Introduction to probability , 1999, Statistics for the Behavioural Sciences.
[8] Wei Chen,et al. Towards a Better Understanding of Modeling Feasibility Robustness in Engineering Design , 2000 .
[9] Rob A. Rutenbar,et al. Statistical Blockade: A Novel Method for Very Fast Monte Carlo Simulation of Rare Circuit Events, and its Application , 2007, 2007 Design, Automation & Test in Europe Conference & Exhibition.
[10] Yu Cao,et al. New Generation of Predictive Technology Model for Sub-45 nm Early Design Exploration , 2006, IEEE Transactions on Electron Devices.
[11] Helmut Graeb,et al. Circuit optimization driven by worst-case distances , 1991, 1991 IEEE International Conference on Computer-Aided Design Digest of Technical Papers.
[12] Amir Dembo,et al. Large Deviations Techniques and Applications , 1998 .
[13] Robert C. Aitken,et al. Worst-Case Design and Margin for Embedded SRAM , 2007, 2007 Design, Automation & Test in Europe Conference & Exhibition.