Synthesizing distributed pipelining systems with timing constraints via optimal functional unit assignment and communication selection
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Lin Wu | Edwin Hsing-Mean Sha | Qingfeng Zhuge | Weiwen Jiang | Xianzhang Chen | E. Sha | Q. Zhuge | Xianzhang Chen | Weiwen Jiang | Lin Wu
[1] Rami G. Melhem,et al. Energy-Efficient Thread Assignment Optimization for Heterogeneous Multicore Systems , 2015, ACM Trans. Embed. Comput. Syst..
[2] Peter A. Beerel,et al. Slack matching asynchronous designs , 2006, 12th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC'06).
[3] Kang G. Shin,et al. Allocation of Periodic Task Modules with Precedence and Deadline Constraints , 1997, IEEE Trans. Computers.
[4] Sander Stuijk,et al. Throughput-Buffering Trade-Off Exploration for Cyclo-Static and Synchronous Dataflow Graphs , 2008, IEEE Transactions on Computers.
[5] Sander Stuijk,et al. Minimising buffer requirements of synchronous dataflow graphs with model checking , 2005, Proceedings. 42nd Design Automation Conference, 2005..
[6] Xiaobo Sharon Hu,et al. Temperature-Aware Scheduling and Assignment for Hard Real-Time Applications on MPSoCs , 2011, IEEE Trans. Very Large Scale Integr. Syst..
[7] Edwin Hsing-Mean Sha,et al. FoToNoC: A hierarchical management strategy based on folded lorus-like Network-on-Chip for dark silicon many-core systems , 2016, 2016 21st Asia and South Pacific Design Automation Conference (ASP-DAC).
[8] Meikang Qiu,et al. Timing optimization via nest-loop pipelining considering code size , 2008, Microprocess. Microsystems.
[9] Edwin Hsing-Mean Sha,et al. Properties of Self-Timed Ring Architectures for Deadlock-Free and Consistent Configuration Reaching Maximum Throughput , 2016, J. Signal Process. Syst..
[10] Xin Yao,et al. Hybrid meta-heuristics algorithms for task assignment in heterogeneous computing systems , 2006, Comput. Oper. Res..
[11] Lei Zhou,et al. Optimal Functional-Unit Assignment for Heterogeneous Systems Under Timing Constraint , 2017, IEEE Transactions on Parallel and Distributed Systems.
[12] David Geer. Is it time for clockless chips? [Asynchronous processor chips] , 2005, Computer.
[13] Shinn-Ying Ho,et al. OPSO: Orthogonal Particle Swarm Optimization and Its Application to Task Assignment Problems , 2008, IEEE Transactions on Systems, Man, and Cybernetics - Part A: Systems and Humans.
[14] Larry Carter,et al. Scheduling strategies for master-slave tasking on heterogeneous processor platforms , 2004, IEEE Transactions on Parallel and Distributed Systems.
[15] Mark Russell Greenstreet,et al. Stari: a technique for high-bandwidth communication , 1993 .
[16] Keshab K. Parhi,et al. Register minimization in cost-optimal synthesis of DSP architectures , 1995, VLSI Signal Processing, VIII.
[17] Filipe Moutinho,et al. Asynchronous-Channels Within Petri Net-Based GALS Distributed Embedded Systems Modeling , 2014, IEEE Transactions on Industrial Informatics.
[18] Ewa Niewiadomska-Szynkiewicz,et al. Design and implementation of energy-aware application-specific CPU frequency governors for the heterogeneous distributed computing systems , 2018, Future Gener. Comput. Syst..
[19] Peter A. Beerel,et al. A Designer's Guide to Asynchronous VLSI , 2010 .
[20] Peng-Yeng Yin,et al. A hybrid particle swarm optimization algorithm for optimal task assignment in distributed systems , 2006, Comput. Stand. Interfaces.
[21] Tadao Murata,et al. Petri nets: Properties, analysis and applications , 1989, Proc. IEEE.
[22] Keshab K. Parhi,et al. ILP-based cost-optimal DSP synthesis with module selection and data format conversion , 1998, IEEE Trans. Very Large Scale Integr. Syst..
[23] Keshab K. Parhi,et al. Loop-list scheduling for heterogeneous functional units , 1996, Proceedings of the Sixth Great Lakes Symposium on VLSI.
[24] Makoto Iwata,et al. A macroscopic behavior model for self-timed pipeline systems , 2003, Seventeenth Workshop on Parallel and Distributed Simulation, 2003. (PADS 2003). Proceedings..
[25] Ishfaq Ahmad,et al. Optimal task assignment in heterogeneous distributed computing systems , 1998, IEEE Concurr..
[26] Wei Zhang,et al. Traffic-Aware Application Mapping for Network-on-Chip Based Multiprocessor System-on-Chip , 2015, 2015 IEEE 17th International Conference on High Performance Computing and Communications, 2015 IEEE 7th International Symposium on Cyberspace Safety and Security, and 2015 IEEE 12th International Conference on Embedded Software and Systems.
[27] Rob Payne,et al. Self-Timed FPGA Systems , 1995, FPL.
[28] Lui Sha,et al. The real-time publisher/subscriber inter-process communication model for distributed real-time systems: design and implementation , 1995, Proceedings Real-Time Technology and Applications Symposium.
[29] Paulo Veríssimo,et al. Distributed Systems for System Architects , 2001, Advances in Distributed Computing and Middleware.
[30] Montek Singh,et al. Automated Microarchitectural Exploration for Achieving Throughput Targets in Pipelined Asynchronous Systems , 2010, 2010 IEEE Symposium on Asynchronous Circuits and Systems.
[31] Mark R. Greenstreet,et al. Self-timed meshes are faster than synchronous , 1997, Proceedings Third International Symposium on Advanced Research in Asynchronous Circuits and Systems.
[32] Hong He,et al. Task assignment in heterogeneous computing systems using an effective iterated greedy algorithm , 2011, J. Syst. Softw..
[33] Jing Liu,et al. Minimizing System Cost with Efficient Task Assignment on Heterogeneous Multicore Processors Considering Time Constraint , 2014, IEEE Transactions on Parallel and Distributed Systems.
[34] Meikang Qiu,et al. Cost minimization while satisfying hard/soft timing constraints for heterogeneous embedded systems , 2009, TODE.
[35] Edwin Hsing-Mean Sha,et al. Iterational retiming with partitioning: Loop scheduling with complete memory latency hiding , 2010, TECS.
[36] Sander Stuijk,et al. Exploring trade-offs in buffer requirements and throughput constraints for synchronous dataflow graphs , 2006, 2006 43rd ACM/IEEE Design Automation Conference.
[37] Edwin Hsing-Mean Sha,et al. On self-timed ring for consistent mapping and maximum throughput , 2014, 2014 IEEE 20th International Conference on Embedded and Real-Time Computing Systems and Applications.
[38] Uday B. Desai,et al. GeoSense: A Multimode Information and Communication System , 2012 .
[39] Edwin Hsing-Mean Sha,et al. Optimal functional-unit assignment and buffer placement for probabilistic pipelines , 2016, 2016 International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS).
[40] Edwin Hsing-Mean Sha,et al. FoToNoC: A Folded Torus-Like Network-on-Chip Based Many-Core Systems-on-Chip in the Dark Silicon Era , 2017, IEEE Transactions on Parallel and Distributed Systems.
[41] Marilyn Wolf. High-Performance Embedded Computing: Applications in Cyber-Physical Systems and Mobile Computing , 2014 .
[42] Edwin Hsing-Mean Sha,et al. On the Design of High-Performance and Energy-Efficient Probabilistic Self-Timed Systems , 2015, 2015 IEEE 17th International Conference on High Performance Computing and Communications, 2015 IEEE 7th International Symposium on Cyberspace Safety and Security, and 2015 IEEE 12th International Conference on Embedded Software and Systems.
[43] Sartaj Sahni,et al. On the circuit implementation problem , 1992, DAC '92.
[44] Imtiaz Ahmad,et al. Particle swarm optimization for task assignment problem , 2002, Microprocess. Microsystems.
[45] Edwin Hsing-Mean Sha,et al. Scheduling Data-Flow Graphs via Retiming and Unfolding , 1997, IEEE Trans. Parallel Distributed Syst..
[46] Achim Rettberg,et al. A fully self-timed bit-serial pipeline architecture for embedded systems , 2003, 2003 Design, Automation and Test in Europe Conference and Exhibition.
[47] Lawrence W. Dowdy,et al. Static Processor Allocation in a Soft Real-Time Multiprocessor Environment , 1994, IEEE Trans. Parallel Distributed Syst..
[48] Wayne H. Wolf,et al. TGFF: task graphs for free , 1998, Proceedings of the Sixth International Workshop on Hardware/Software Codesign. (CODES/CASHE'98).
[49] Daniel Gajski,et al. Partitioning and pipelining for performance-constrained hardware/software systems , 1999, IEEE Trans. Very Large Scale Integr. Syst..
[50] Filipe Moutinho,et al. Distributed embedded systems design using Petri nets , 2013, 2013 23rd International Conference on Field programmable Logic and Applications.
[51] Edwin Hsing-Mean Sha,et al. Efficient assignment and scheduling for heterogeneous DSP systems , 2005, IEEE Transactions on Parallel and Distributed Systems.
[52] Wai Ho Mow,et al. A Case Study on the Communication and Computation Behaviors of Real Applications in NoC-Based MPSoCs , 2014, 2014 IEEE Computer Society Annual Symposium on VLSI.