Enhancing the performances of recycling folded cascode OpAmp in nanoscale CMOS through voltage supply doubling and design for reliability

Current-oriented operational amplifier OpAmp design has been common for its orderly current-to-speed tradeoff. However, for high-precision or high-linearity applications, increasing the current does not help much, as the supply voltage VDD and intrinsic gain of the MOSFETs in ultra-scaled CMOS technologies are very limited. This paper introduces voltage-oriented circuit techniques to address such limitations. Specifically, a 2xVDD-enabled recycling folded cascade RFC OpAmp is proposed. It features: 1 current recycling to enhance the effective trans conductance by 4x with no extra power; 2 transistor stacking to boost the output resistance by one to two orders of magnitude; and 3 VDD elevating to enlarge the linear output swing by 4x. Comparing with its 1xVDD RFC and FC counterparts, the proposed solution achieves 20-dB higher DC gain i.e. 72.8 dB in open loop and 20-dB lower IM3 i.e., -76.5 dB in closed loop, under the same power budget of 0.6 mW in a 1-V General Purpose 65-nm CMOS process. In many applications, these joint improvements in a single stage are already adequate, being more power efficient i.e. less current paths, stable i.e. more phase margin, and compact i.e. no frequency compensation than multi-stage OpAmps. Voltage-conscious biasing and node-voltage trajectory check ensure the device reliability in both transient and steady states. No specialized high-voltage device is necessary. Copyright © 2012 John Wiley & Sons, Ltd.

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