A Power and Area Optimization Approach of Mixed Polarity Reed-Muller Expression for Incompletely Specified Boolean Functions

The power and area optimization of Reed-Muller (RM) circuits has been widely concerned. However, almost none of the exiting power and area optimization approaches can obtain all the Pareto optimal solutions of the original problem and are efficient enough. Moreover, they have not considered the don’t care terms, which makes the circuit performance unable to be further optimized. In this paper, we propose a power and area optimization approach of mixed polarity RM expression (MPRM) for incompletely specified Boolean functions based on Non-Dominated Sorting Genetic Algorithm II (NSGA-II). Firstly, the incompletely specified Boolean function is transformed into zero polarity incompletely specified MPRM (ISMPRM) by using a novel ISMPRM acquisition algorithm. Secondly, the polarity and allocation of don’t care terms of ISMPRM is encoded as chromosome. Lastly, the Pareto optimal solutions are obtained by using NSGA-II, in which MPRM corresponding to the given chromosome is obtained by using a chromosome conversion algorithm. The results on incompletely specified Boolean functions and MCNC benchmark circuits show that a significant power and area improvement can be made compared with the existing power and area optimization approaches of RM circuits.

[1]  Xunwei Wu,et al.  Power minimization of FPRM functions based on polarity conversion , 2008, Journal of Computer Science and Technology.

[2]  Lingli Wang,et al.  Search for the Best Polarity of Multi-Output RM Circuits Base on QGA , 2008, 2008 Second International Symposium on Intelligent Information Technology Application.

[3]  Kalyanmoy Deb,et al.  A fast and elitist multiobjective genetic algorithm: NSGA-II , 2002, IEEE Trans. Evol. Comput..

[4]  Santanu Chattopadhyay,et al.  Fixed Polarity Reed-Muller Network Synthesis and Its Application in AND-OR/XOR-based Circuit Realization with Area-Power Trade-off , 2008 .

[5]  Zhang Huihong,et al.  Area and Power Optimization of ISFPRM Circuits Based on PSGA Algorithm , 2013 .

[6]  Peng-Jun Wang,et al.  Power optimization of incompletely specified fixed polarity Reed-Muller circuits , 2012, 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology.

[7]  Tsutomu Sasao,et al.  Exact Minimization of FPRMs for Incompletely Specified Functions by Using MTBDDs , 2005, IEICE Trans. Fundam. Electron. Commun. Comput. Sci..

[8]  I. Y. Kim,et al.  Adaptive weighted-sum method for bi-objective optimization: Pareto front generation , 2005 .

[9]  Yinshui Xia,et al.  Area and power optimization of FPRM function based circuits , 2003, Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03..

[10]  Sambhu Nath Pradhan,et al.  Thermal aware FPRM based AND-XOR network synthesis of logic circuits , 2015, 2015 IEEE 2nd International Conference on Recent Trends in Information Systems (ReTIS).

[11]  Pengjun Wang,et al.  Polarity optimization of XNOR/OR circuit area and power based on weighted sum method , 2011, 2011 9th IEEE International Conference on ASIC.

[12]  Wang Zhenhai,et al.  Conversion algorithm for MPRM expansion , 2014 .

[13]  Rekha K. James,et al.  Optimal design of combinational logic circuits using genetic algorithm and Reed-Muller Universal Logic Modules , 2014, 2014 International Conference on Embedded Systems (ICES).

[14]  Limin Xiao,et al.  Optimization of best polarity searching for mixed polarity reed-muller logic circuit , 2015, 2015 28th IEEE International System-on-Chip Conference (SOCC).

[15]  Limin Xiao,et al.  Power Optimization in Logic Synthesis for Mixed Polarity Reed-Muller Logic Circuits , 2015, Comput. J..

[16]  Wang Pengjun,et al.  PMGA and its application in area and power optimization for ternary FPRM circuit , 2016 .

[17]  Limin Xiao,et al.  Probabilistic Modeling during Power Estimation for Mixed Polarity Reed-Muller Logic Circuits , 2013, 2013 IEEE International Conference on Green Computing and Communications and IEEE Internet of Things and IEEE Cyber, Physical and Social Computing.

[18]  Sambhu Nath Pradhan,et al.  Shared Reed-Muller Decision Diagram Based Thermal-Aware AND-XOR Decomposition of Logic Circuits , 2016, VLSI Design.

[19]  A.E.A. Almaini,et al.  Tabular techniques for generating Kronecker expansions , 1996 .

[20]  Maki K. Habib.  A new approach to generate fixed-polarity Reed–Muller expansions for completely and incompletely specified functions , 2002 .

[21]  Santanu Chattopadhyay,et al.  AND-XOR Network Synthesis with Area-Power Trade-off , 2008 .

[22]  汪鹏君,et al.  GA-DTPSO Algorithm and its Application in Area Optimization of Mixed Polarity XNOR/OR Circuits , 2015 .

[23]  A.E.A. Almaini,et al.  Minimization of incompletely specified mixed polarity reed muller functions using Genetic Algorithm , 2009, 2009 3rd International Conference on Signals, Circuits and Systems (SCS).

[24]  Yinshui Xia,et al.  Cell Mapping for Nanohybrid Circuit Architecture Using Genetic Algorithm , 2012, Journal of Computer Science and Technology.

[25]  Bu Deng-l.  Dual Logic Based Polarity Conversion and Optimization of Mixed Polarity RM Circuits , 2015 .

[26]  汪鹏君,et al.  Conversion algorithm for MPRM expansion , 2014 .

[27]  T. Sasao,et al.  Exact minimization of fixed polarity Reed-Muller expressions for incompletely specified functions , 2000, Proceedings 2000. Design Automation Conference. (IEEE Cat. No.00CH37106).