论文信息 - A CMOS DLL-based 120MHz to 1.8GHz clock generator for dynamic frequency scaling

A CMOS DLL-based 120MHz to 1.8GHz clock generator for dynamic frequency scaling

A DLL-based clock generator for dynamic frequency scaling is fabricated in a 0.35 /spl mu/m CMOS technology. It generates clock signals ranging from 120MHz to 1.8GHz. The frequency can be dynamically changed. If the clock generator scales its output frequency dynamically by programming with the same last bit, it takes only one clock cycle to lock. The proposed clock generator has a jitter of /spl plusmn/6.6ps/sub pp/ at 1.3GHz.

[1] P. R. Gray,et al. A 900 MHz local oscillator using a DLL-based frequency multiplier technique for PCS applications , 2000 .

[2] Chulwoo Kim,et al. Low-power small-area ±7.28 ps jitter 1 GHz DLL-based clock generator , 2002 .

[3] G. Chien,et al. A 900-MHz local oscillator using a DLL-based frequency multiplier technique for PCS applications , 2000, IEEE Journal of Solid-State Circuits.

[4] David J. Foley,et al. CMOS DLL-based 2-V 3.2-ps jitter 1-GHz clock synthesizer and temperature-compensated tunable oscillator , 2001 .

[5] David J. Foley,et al. CMOS DLL based 2 V, 3.2 ps jitter, 1 GHz clock synthesizer and temperature compensated tunable oscillator , 2000, Proceedings of the IEEE 2000 Custom Integrated Circuits Conference (Cat. No.00CH37044).

[6] R. Farjad-Rad,et al. A 0.2-2 GHz 12 mW multiplying DLL for low-jitter clock synthesis in highly-integrated data communication chips , 2002, 2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315).