IMPLEMENTATION OF GENETIC ALGORITHMS FOR VLSI CAD DESIGN

This paper proposes an architecture for implementing Genetic Algorithms(GA) used for circuit partitioning in VLSI physical design automation. The architecture employs a combination of pipelining and parallelization to achieve speedups over software based GA. The design uses six modules along with three external memories. The proposed design was coded in VHDL and was functionally verified by writing a testbench and simulating it using ModelSim. The design was synthesized on Virtex part xcv50e using Xilinx ISE 4.1. The genetic algorithm processor proposed in this paper achieves more than 100 improvement in processing speed as compared to the software implementation. The proposed architecture is outlined and briefly discussed in this paper, while the current results are presented and analyzed.

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