论文信息 - Performance of CMOS current mode full adders

Performance of CMOS current mode full adders

We present the performance of three different multivalued current mode 1-bit adders. These circuits have been simulated with the electrical parameters of a standard 1.2 /spl mu/m CMOS technology. The performance of a binary voltage mode 1-bit adder is also presented. The binary version uses twice more transistors comparing with multivalued ones, but it is two or three times faster. Multivalued versions are more complicated to design and optimize. These results confirm the chip density advantage of multivalued circuits and the speed advantage of binary versions when using CMOS technologies.<<ETX>>

Keivan Navi | Daniel Etiemble | A. Kazeminejad

[1] Keivan Navi,et al. Algorithms and multi-valued circuits for the multioperand addition in the binary stored-carry number system , 1993, Proceedings of IEEE 11th Symposium on Computer Arithmetic.

[2] S. Kawahito,et al. VLSI-oriented bi-directional current-mode arithmetic circuits based on the Radix-4 signed-digit number system , 1986 .

[3] K. W. Current,et al. A Quaternary Logic Encoder-Decoder Circuit Design Using CMOS, , 1983 .

[4] Shoji Kawahito,et al. Parallel hardware algorithms with redundant number representations for multiple-valued arithmetic VLSI , 1992, [1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic.

[5] Michitaka Kameyama,et al. A 32 × 32 BIT multiplier using multiple-valued MOS current-mode circuits , 1987, 1987 Symposium on VLSI Circuits.

[6] K. W. Current,et al. CMOS current comparator circuit , 1983 .

[7] Daniel Etiemble. On the performance of multivalued integrated circuits: past, present and future , 1992, [1992] Proceedings The Twenty-Second International Symposium on Multiple-Valued Logic.

[8] Keivan Navi,et al. A basis for the comparison of binary and m-valued current mode circuits: the multioperand addition with redundant number systems , 1993, [1993] Proceedings of the Twenty-Third International Symposium on Multiple-Valued Logic.