论文信息 - A BIST scheme for full characterization of ADC parameters in Mixed-Signal SoCs

A BIST scheme for full characterization of ADC parameters in Mixed-Signal SoCs

A BIST scheme that can both characterize the dynamic and static parameters of ADCs in Mixed-Signal SoCs are proposed in this paper. This approach can be implemented almost all digitally except for a few simple analog filters. Analog stimulus for both the dynamic and static test are encoded and stored in on-chip RAM or ROM and retrieved when the corresponding test starts. Elemental operative units and memories for response analysis can be reused to reduce hardware consumption. The proposed scheme unifies the stimulus generation mechanism and reuses the resource for response analysis thus can be implemented with reasonable area overhead.

Jun Du | Chao Yuan | Yuanfu Zhao

[1] Karim Arabi,et al. Testing analog and mixed-signal integrated circuits using oscillation-test method , 1997, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[2] Jose Machado da Silva,et al. Dynamic characterisation of analogue-to-digital converters , 2005 .

[3] Gordon W. Roberts,et al. A BIST scheme for a SNR, gain tracking, and frequency response test of a sigma-delta ADC , 1995 .

[4] Gordon W. Roberts,et al. On the practical implementation of mixed analog-digital BIST , 1995, Proceedings of the IEEE 1995 Custom Integrated Circuits Conference.

[5] Degang Chen,et al. Fast implementation of a linearity test approach for high-resolution ADCs using non-linear ramp signals , 2004, 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512).

[6] Bozena Kaminska,et al. Oscillation built-in self test (OBIST) scheme for functional and structural testing of analog and mixed-signal integrated circuits , 1997, Proceedings International Test Conference 1997.

[7] Michel Renovell,et al. Towards an ADC BIST scheme using the histogram test technique , 2000, Proceedings IEEE European Test Workshop.

[8] Michel Renovell,et al. A high accuracy triangle-wave signal generator for on-chip ADC testing , 2002, Proceedings The Seventh IEEE European Test Workshop.

[9] Gordon W. Roberts,et al. An integration of memory-based analog signal generation into current DFT architectures , 1998, IEEE Trans. Instrum. Meas..