Modular testprocessor for VLSI chips and high-density PC boards

A method for the test of VLSI chips and high-density PC boards is proposed. A built-in, microprogrammable test controller, called a testprocessor, applied tests to all separately testable blocks within either a VLSI chip or PC board, hence increasing controllability and observability. Facilities for test-pattern storage and test-result evaluation as well as means for test-pattern generation and response compaction are provided; consequently, most tasks commonly associated with an external test equipment can be covered by the testprocessor. In contrast to most concepts of built-in test known to date, the testprocessor support tests of all kinds (structural, functional, pseudorandom), applied serially or in parallel; furthermore, adaptation to standardized test interfaces can easily be achieved. The concept is intended to simplify wafer test, production test, and testing burn-in, and it supports field maintenance and system self-test. >

[1]  Donald Komonytsky,et al.  LSI Self-Test Using Level Sensitive Scan Design and Signature Analysis , 1982, ITC.

[2]  Hideo Fujiwara,et al.  A New Built-In Self-Test Design for PLA's with Hligh Fault Coverage and Low Overhead , 1987, IEEE Transactions on Computers.

[3]  C. L. Chen,et al.  Linear Dependencies in Linear Feedback Shift Registers , 1986, IEEE Transactions on Computers.

[4]  Sunil Jain,et al.  Built-in Self Testing of Embedded Memories , 1986, IEEE Design & Test of Computers.

[5]  John Kuban,et al.  Testability Features of the MC68020 , 1984, ITC.

[6]  Thomas W. Williams,et al.  Design for Testability - A Survey , 1982, IEEE Trans. Computers.

[7]  Edward J. McCluskey,et al.  Design of Totally Self-Checking Comparators with an Arbitrary Number of Inputs , 1984, IEEE Transactions on Computers.

[8]  Edward J. McCluskey,et al.  Pseudorandom Testing , 1987, IEEE Transactions on Computers.

[9]  T. S. Liu The Role of a Maintenance Processor for a General-Purpose Computer System , 1984, IEEE Transactions on Computers.

[10]  Frans P. M. Beenker Systematic and Structured Methods for Digital Board Testing , 1985, ITC.

[11]  René David Signature Analysis for Multiple-Output Circuits , 1986, IEEE Transactions on Computers.

[12]  Carlo H. Séquin,et al.  Design and Application of Self-Testing Comparators Implemented with MOS PLA's , 1984, IEEE Transactions on Computers.

[13]  J. Mucha,et al.  Built-In Test for Complex Digital Integrated Circuits , 1979, Fifth European Solid State Circuits Conference - ESSCIRC 79.

[14]  John R. Kuban,et al.  The MC6804P2 Built-In Self-Test , 1983, ITC.

[15]  Johnny J. LeBlanc,et al.  LOCST: A Built-In Self-Test Technique , 1984, IEEE Design & Test of Computers.